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@@ -142,18 +142,18 @@ static int gdrom_hardreset(struct cdrom_device_info *cd_info);
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static bool gdrom_is_busy(void)
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{
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- return (ctrl_inb(GDROM_ALTSTATUS_REG) & 0x80) != 0;
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+ return (__raw_readb(GDROM_ALTSTATUS_REG) & 0x80) != 0;
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}
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static bool gdrom_data_request(void)
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{
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- return (ctrl_inb(GDROM_ALTSTATUS_REG) & 0x88) == 8;
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+ return (__raw_readb(GDROM_ALTSTATUS_REG) & 0x88) == 8;
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}
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static bool gdrom_wait_clrbusy(void)
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{
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unsigned long timeout = jiffies + GDROM_DEFAULT_TIMEOUT;
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- while ((ctrl_inb(GDROM_ALTSTATUS_REG) & 0x80) &&
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+ while ((__raw_readb(GDROM_ALTSTATUS_REG) & 0x80) &&
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(time_before(jiffies, timeout)))
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cpu_relax();
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return time_before(jiffies, timeout + 1);
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@@ -181,14 +181,14 @@ static void gdrom_identifydevice(void *buf)
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gdrom_getsense(NULL);
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return;
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}
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- ctrl_outb(GDROM_COM_IDDEV, GDROM_STATUSCOMMAND_REG);
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+ __raw_writeb(GDROM_COM_IDDEV, GDROM_STATUSCOMMAND_REG);
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if (!gdrom_wait_busy_sleeps()) {
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gdrom_getsense(NULL);
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return;
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}
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/* now read in the data */
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for (c = 0; c < 40; c++)
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- data[c] = ctrl_inw(GDROM_DATA_REG);
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+ data[c] = __raw_readw(GDROM_DATA_REG);
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}
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static void gdrom_spicommand(void *spi_string, int buflen)
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@@ -197,21 +197,21 @@ static void gdrom_spicommand(void *spi_string, int buflen)
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unsigned long timeout;
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/* ensure IRQ_WAIT is set */
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- ctrl_outb(0x08, GDROM_ALTSTATUS_REG);
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+ __raw_writeb(0x08, GDROM_ALTSTATUS_REG);
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/* specify how many bytes we expect back */
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- ctrl_outb(buflen & 0xFF, GDROM_BCL_REG);
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- ctrl_outb((buflen >> 8) & 0xFF, GDROM_BCH_REG);
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+ __raw_writeb(buflen & 0xFF, GDROM_BCL_REG);
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+ __raw_writeb((buflen >> 8) & 0xFF, GDROM_BCH_REG);
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/* other parameters */
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- ctrl_outb(0, GDROM_INTSEC_REG);
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- ctrl_outb(0, GDROM_SECNUM_REG);
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- ctrl_outb(0, GDROM_ERROR_REG);
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+ __raw_writeb(0, GDROM_INTSEC_REG);
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+ __raw_writeb(0, GDROM_SECNUM_REG);
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+ __raw_writeb(0, GDROM_ERROR_REG);
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/* Wait until we can go */
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if (!gdrom_wait_clrbusy()) {
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gdrom_getsense(NULL);
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return;
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}
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timeout = jiffies + GDROM_DEFAULT_TIMEOUT;
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- ctrl_outb(GDROM_COM_PACKET, GDROM_STATUSCOMMAND_REG);
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+ __raw_writeb(GDROM_COM_PACKET, GDROM_STATUSCOMMAND_REG);
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while (!gdrom_data_request() && time_before(jiffies, timeout))
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cpu_relax();
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if (!time_before(jiffies, timeout + 1)) {
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@@ -233,10 +233,10 @@ static char gdrom_execute_diagnostic(void)
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gdrom_hardreset(gd.cd_info);
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if (!gdrom_wait_clrbusy())
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return 0;
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- ctrl_outb(GDROM_COM_EXECDIAG, GDROM_STATUSCOMMAND_REG);
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+ __raw_writeb(GDROM_COM_EXECDIAG, GDROM_STATUSCOMMAND_REG);
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if (!gdrom_wait_busy_sleeps())
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return 0;
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- return ctrl_inb(GDROM_ERROR_REG);
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+ return __raw_readb(GDROM_ERROR_REG);
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}
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/*
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@@ -385,7 +385,7 @@ static void gdrom_release(struct cdrom_device_info *cd_info)
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static int gdrom_drivestatus(struct cdrom_device_info *cd_info, int ignore)
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{
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/* read the sense key */
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- char sense = ctrl_inb(GDROM_ERROR_REG);
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+ char sense = __raw_readb(GDROM_ERROR_REG);
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sense &= 0xF0;
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if (sense == 0)
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return CDS_DISC_OK;
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@@ -398,16 +398,16 @@ static int gdrom_drivestatus(struct cdrom_device_info *cd_info, int ignore)
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static int gdrom_mediachanged(struct cdrom_device_info *cd_info, int ignore)
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{
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/* check the sense key */
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- return (ctrl_inb(GDROM_ERROR_REG) & 0xF0) == 0x60;
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+ return (__raw_readb(GDROM_ERROR_REG) & 0xF0) == 0x60;
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}
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/* reset the G1 bus */
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static int gdrom_hardreset(struct cdrom_device_info *cd_info)
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{
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int count;
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- ctrl_outl(0x1fffff, GDROM_RESET_REG);
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+ __raw_writel(0x1fffff, GDROM_RESET_REG);
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for (count = 0xa0000000; count < 0xa0200000; count += 4)
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- ctrl_inl(count);
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+ __raw_readl(count);
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return 0;
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}
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@@ -536,7 +536,7 @@ static const struct block_device_operations gdrom_bdops = {
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static irqreturn_t gdrom_command_interrupt(int irq, void *dev_id)
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{
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- gd.status = ctrl_inb(GDROM_STATUSCOMMAND_REG);
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+ gd.status = __raw_readb(GDROM_STATUSCOMMAND_REG);
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if (gd.pending != 1)
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return IRQ_HANDLED;
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gd.pending = 0;
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@@ -546,7 +546,7 @@ static irqreturn_t gdrom_command_interrupt(int irq, void *dev_id)
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static irqreturn_t gdrom_dma_interrupt(int irq, void *dev_id)
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{
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- gd.status = ctrl_inb(GDROM_STATUSCOMMAND_REG);
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+ gd.status = __raw_readb(GDROM_STATUSCOMMAND_REG);
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if (gd.transfer != 1)
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return IRQ_HANDLED;
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gd.transfer = 0;
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@@ -600,10 +600,10 @@ static void gdrom_readdisk_dma(struct work_struct *work)
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spin_unlock(&gdrom_lock);
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block = blk_rq_pos(req)/GD_TO_BLK + GD_SESSION_OFFSET;
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block_cnt = blk_rq_sectors(req)/GD_TO_BLK;
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- ctrl_outl(virt_to_phys(req->buffer), GDROM_DMA_STARTADDR_REG);
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- ctrl_outl(block_cnt * GDROM_HARD_SECTOR, GDROM_DMA_LENGTH_REG);
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- ctrl_outl(1, GDROM_DMA_DIRECTION_REG);
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- ctrl_outl(1, GDROM_DMA_ENABLE_REG);
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+ __raw_writel(virt_to_phys(req->buffer), GDROM_DMA_STARTADDR_REG);
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+ __raw_writel(block_cnt * GDROM_HARD_SECTOR, GDROM_DMA_LENGTH_REG);
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+ __raw_writel(1, GDROM_DMA_DIRECTION_REG);
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+ __raw_writel(1, GDROM_DMA_ENABLE_REG);
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read_command->cmd[2] = (block >> 16) & 0xFF;
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read_command->cmd[3] = (block >> 8) & 0xFF;
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read_command->cmd[4] = block & 0xFF;
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@@ -611,18 +611,18 @@ static void gdrom_readdisk_dma(struct work_struct *work)
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read_command->cmd[9] = (block_cnt >> 8) & 0xFF;
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read_command->cmd[10] = block_cnt & 0xFF;
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/* set for DMA */
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- ctrl_outb(1, GDROM_ERROR_REG);
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+ __raw_writeb(1, GDROM_ERROR_REG);
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/* other registers */
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- ctrl_outb(0, GDROM_SECNUM_REG);
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- ctrl_outb(0, GDROM_BCL_REG);
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- ctrl_outb(0, GDROM_BCH_REG);
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- ctrl_outb(0, GDROM_DSEL_REG);
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- ctrl_outb(0, GDROM_INTSEC_REG);
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+ __raw_writeb(0, GDROM_SECNUM_REG);
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+ __raw_writeb(0, GDROM_BCL_REG);
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+ __raw_writeb(0, GDROM_BCH_REG);
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+ __raw_writeb(0, GDROM_DSEL_REG);
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+ __raw_writeb(0, GDROM_INTSEC_REG);
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/* Wait for registers to reset after any previous activity */
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timeout = jiffies + HZ / 2;
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while (gdrom_is_busy() && time_before(jiffies, timeout))
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cpu_relax();
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- ctrl_outb(GDROM_COM_PACKET, GDROM_STATUSCOMMAND_REG);
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+ __raw_writeb(GDROM_COM_PACKET, GDROM_STATUSCOMMAND_REG);
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timeout = jiffies + HZ / 2;
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/* Wait for packet command to finish */
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while (gdrom_is_busy() && time_before(jiffies, timeout))
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@@ -632,11 +632,11 @@ static void gdrom_readdisk_dma(struct work_struct *work)
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outsw(GDROM_DATA_REG, &read_command->cmd, 6);
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timeout = jiffies + HZ / 2;
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/* Wait for any pending DMA to finish */
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- while (ctrl_inb(GDROM_DMA_STATUS_REG) &&
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+ while (__raw_readb(GDROM_DMA_STATUS_REG) &&
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time_before(jiffies, timeout))
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cpu_relax();
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/* start transfer */
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- ctrl_outb(1, GDROM_DMA_STATUS_REG);
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+ __raw_writeb(1, GDROM_DMA_STATUS_REG);
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wait_event_interruptible_timeout(request_queue,
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gd.transfer == 0, GDROM_DEFAULT_TIMEOUT);
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err = gd.transfer ? -EIO : 0;
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@@ -714,11 +714,11 @@ free_id:
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/* set the default mode for DMA transfer */
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static int __devinit gdrom_init_dma_mode(void)
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{
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- ctrl_outb(0x13, GDROM_ERROR_REG);
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- ctrl_outb(0x22, GDROM_INTSEC_REG);
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+ __raw_writeb(0x13, GDROM_ERROR_REG);
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+ __raw_writeb(0x22, GDROM_INTSEC_REG);
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if (!gdrom_wait_clrbusy())
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return -EBUSY;
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- ctrl_outb(0xEF, GDROM_STATUSCOMMAND_REG);
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+ __raw_writeb(0xEF, GDROM_STATUSCOMMAND_REG);
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if (!gdrom_wait_busy_sleeps())
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return -EBUSY;
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/* Memory protection setting for GDROM DMA
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@@ -728,8 +728,8 @@ static int __devinit gdrom_init_dma_mode(void)
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* Bits 6 - 0 end of transfer range in 1 MB blocks OR'ed with 0x80
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* (0x40 | 0x80) = start range at 0x0C000000
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* (0x7F | 0x80) = end range at 0x0FFFFFFF */
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- ctrl_outl(0x8843407F, GDROM_DMA_ACCESS_CTRL_REG);
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- ctrl_outl(9, GDROM_DMA_WAIT_REG); /* DMA word setting */
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+ __raw_writel(0x8843407F, GDROM_DMA_ACCESS_CTRL_REG);
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+ __raw_writel(9, GDROM_DMA_WAIT_REG); /* DMA word setting */
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return 0;
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}
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