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@@ -543,7 +543,7 @@ struct vendor_txdds_ent {
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static void write_tx_serdes_param(struct qib_pportdata *, struct txdds_ent *);
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#define TXDDS_TABLE_SZ 16 /* number of entries per speed in onchip table */
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-#define TXDDS_EXTRA_SZ 11 /* number of extra tx settings entries */
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+#define TXDDS_EXTRA_SZ 13 /* number of extra tx settings entries */
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#define SERDES_CHANS 4 /* yes, it's obvious, but one less magic number */
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#define H1_FORCE_VAL 8
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@@ -1100,9 +1100,9 @@ static const struct qib_hwerror_msgs qib_7322_hwerror_msgs[] = {
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HWE_AUTO_P(SDmaMemReadErr, 1),
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HWE_AUTO_P(SDmaMemReadErr, 0),
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HWE_AUTO_P(IBCBusFromSPCParityErr, 1),
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+ HWE_AUTO_P(IBCBusToSPCParityErr, 1),
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HWE_AUTO_P(IBCBusFromSPCParityErr, 0),
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- HWE_AUTO_P(statusValidNoEop, 1),
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- HWE_AUTO_P(statusValidNoEop, 0),
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+ HWE_AUTO(statusValidNoEop),
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HWE_AUTO(LATriggered),
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{ .mask = 0 }
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};
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@@ -4763,6 +4763,8 @@ static void qib_7322_mini_pcs_reset(struct qib_pportdata *ppd)
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SYM_MASK(IBPCSConfig_0, tx_rx_reset);
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val = qib_read_kreg_port(ppd, krp_ib_pcsconfig);
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+ qib_write_kreg(dd, kr_hwerrmask,
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+ dd->cspec->hwerrmask & ~HWE_MASK(statusValidNoEop));
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qib_write_kreg_port(ppd, krp_ibcctrl_a,
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ppd->cpspec->ibcctrl_a &
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~SYM_MASK(IBCCtrlA_0, IBLinkEn));
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@@ -4772,6 +4774,9 @@ static void qib_7322_mini_pcs_reset(struct qib_pportdata *ppd)
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qib_write_kreg_port(ppd, krp_ib_pcsconfig, val & ~reset_bits);
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qib_write_kreg_port(ppd, krp_ibcctrl_a, ppd->cpspec->ibcctrl_a);
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qib_write_kreg(dd, kr_scratch, 0ULL);
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+ qib_write_kreg(dd, kr_hwerrclear,
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+ SYM_MASK(HwErrClear, statusValidNoEopClear));
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+ qib_write_kreg(dd, kr_hwerrmask, dd->cspec->hwerrmask);
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}
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/*
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@@ -5624,6 +5629,8 @@ static void set_no_qsfp_atten(struct qib_devdata *dd, int change)
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if (ppd->port != port || !ppd->link_speed_supported)
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continue;
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ppd->cpspec->no_eep = val;
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+ if (seth1)
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+ ppd->cpspec->h1_val = h1;
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/* now change the IBC and serdes, overriding generic */
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init_txdds_table(ppd, 1);
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any++;
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@@ -6064,9 +6071,9 @@ static int qib_init_7322_variables(struct qib_devdata *dd)
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* the "cable info" setup here. Can be overridden
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* in adapter-specific routines.
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*/
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- if (!(ppd->dd->flags & QIB_HAS_QSFP)) {
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- if (!IS_QMH(ppd->dd) && !IS_QME(ppd->dd))
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- qib_devinfo(ppd->dd->pcidev, "IB%u:%u: "
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+ if (!(dd->flags & QIB_HAS_QSFP)) {
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+ if (!IS_QMH(dd) && !IS_QME(dd))
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+ qib_devinfo(dd->pcidev, "IB%u:%u: "
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"Unknown mezzanine card type\n",
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dd->unit, ppd->port);
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cp->h1_val = IS_QMH(dd) ? H1_FORCE_QMH : H1_FORCE_QME;
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@@ -6119,9 +6126,25 @@ static int qib_init_7322_variables(struct qib_devdata *dd)
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qib_set_ctxtcnt(dd);
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if (qib_wc_pat) {
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- ret = init_chip_wc_pat(dd, NUM_VL15_BUFS * dd->align4k);
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+ resource_size_t vl15off;
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+ /*
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+ * We do not set WC on the VL15 buffers to avoid
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+ * a rare problem with unaligned writes from
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+ * interrupt-flushed store buffers, so we need
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+ * to map those separately here. We can't solve
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+ * this for the rarely used mtrr case.
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+ */
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+ ret = init_chip_wc_pat(dd, 0);
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if (ret)
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goto bail;
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+
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+ /* vl15 buffers start just after the 4k buffers */
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+ vl15off = dd->physaddr + (dd->piobufbase >> 32) +
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+ dd->piobcnt4k * dd->align4k;
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+ dd->piovl15base = ioremap_nocache(vl15off,
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+ NUM_VL15_BUFS * dd->align4k);
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+ if (!dd->piovl15base)
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+ goto bail;
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}
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qib_7322_set_baseaddrs(dd); /* set chip access pointers now */
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@@ -6932,6 +6955,8 @@ static const struct txdds_ent txdds_extra_sdr[TXDDS_EXTRA_SZ] = {
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{ 0, 0, 0, 11 }, /* QME7342 backplane settings */
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{ 0, 0, 0, 11 }, /* QME7342 backplane settings */
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{ 0, 0, 0, 11 }, /* QME7342 backplane settings */
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+ { 0, 0, 0, 3 }, /* QMH7342 backplane settings */
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+ { 0, 0, 0, 4 }, /* QMH7342 backplane settings */
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};
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static const struct txdds_ent txdds_extra_ddr[TXDDS_EXTRA_SZ] = {
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@@ -6947,6 +6972,8 @@ static const struct txdds_ent txdds_extra_ddr[TXDDS_EXTRA_SZ] = {
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{ 0, 0, 0, 13 }, /* QME7342 backplane settings */
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{ 0, 0, 0, 13 }, /* QME7342 backplane settings */
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{ 0, 0, 0, 13 }, /* QME7342 backplane settings */
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+ { 0, 0, 0, 9 }, /* QMH7342 backplane settings */
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+ { 0, 0, 0, 10 }, /* QMH7342 backplane settings */
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};
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static const struct txdds_ent txdds_extra_qdr[TXDDS_EXTRA_SZ] = {
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@@ -6962,6 +6989,8 @@ static const struct txdds_ent txdds_extra_qdr[TXDDS_EXTRA_SZ] = {
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{ 0, 1, 12, 6 }, /* QME7342 backplane setting */
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{ 0, 1, 12, 7 }, /* QME7342 backplane setting */
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{ 0, 1, 12, 8 }, /* QME7342 backplane setting */
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+ { 0, 1, 0, 10 }, /* QMH7342 backplane settings */
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+ { 0, 1, 0, 12 }, /* QMH7342 backplane settings */
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};
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static const struct txdds_ent *get_atten_table(const struct txdds_ent *txdds,
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Roland Dreier