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@@ -357,6 +357,9 @@ static const struct {
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[UD] = (IB_QP_PKEY_INDEX |
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IB_QP_PORT |
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IB_QP_QKEY),
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+ [UC] = (IB_QP_PKEY_INDEX |
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+ IB_QP_PORT |
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+ IB_QP_ACCESS_FLAGS),
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[RC] = (IB_QP_PKEY_INDEX |
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IB_QP_PORT |
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IB_QP_ACCESS_FLAGS),
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@@ -378,6 +381,9 @@ static const struct {
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[UD] = (IB_QP_PKEY_INDEX |
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IB_QP_PORT |
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IB_QP_QKEY),
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+ [UC] = (IB_QP_PKEY_INDEX |
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+ IB_QP_PORT |
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+ IB_QP_ACCESS_FLAGS),
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[RC] = (IB_QP_PKEY_INDEX |
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IB_QP_PORT |
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IB_QP_ACCESS_FLAGS),
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@@ -388,6 +394,11 @@ static const struct {
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[IB_QPS_RTR] = {
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.trans = MTHCA_TRANS_INIT2RTR,
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.req_param = {
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+ [UC] = (IB_QP_AV |
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+ IB_QP_PATH_MTU |
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+ IB_QP_DEST_QPN |
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+ IB_QP_RQ_PSN |
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+ IB_QP_MAX_DEST_RD_ATOMIC),
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[RC] = (IB_QP_AV |
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IB_QP_PATH_MTU |
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IB_QP_DEST_QPN |
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@@ -398,6 +409,9 @@ static const struct {
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.opt_param = {
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[UD] = (IB_QP_PKEY_INDEX |
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IB_QP_QKEY),
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+ [UC] = (IB_QP_ALT_PATH |
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+ IB_QP_ACCESS_FLAGS |
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+ IB_QP_PKEY_INDEX),
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[RC] = (IB_QP_ALT_PATH |
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IB_QP_ACCESS_FLAGS |
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IB_QP_PKEY_INDEX),
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@@ -413,6 +427,8 @@ static const struct {
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.trans = MTHCA_TRANS_RTR2RTS,
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.req_param = {
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[UD] = IB_QP_SQ_PSN,
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+ [UC] = (IB_QP_SQ_PSN |
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+ IB_QP_MAX_QP_RD_ATOMIC),
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[RC] = (IB_QP_TIMEOUT |
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IB_QP_RETRY_CNT |
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IB_QP_RNR_RETRY |
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@@ -423,6 +439,11 @@ static const struct {
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.opt_param = {
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[UD] = (IB_QP_CUR_STATE |
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IB_QP_QKEY),
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+ [UC] = (IB_QP_CUR_STATE |
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+ IB_QP_ALT_PATH |
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+ IB_QP_ACCESS_FLAGS |
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+ IB_QP_PKEY_INDEX |
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+ IB_QP_PATH_MIG_STATE),
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[RC] = (IB_QP_CUR_STATE |
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IB_QP_ALT_PATH |
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IB_QP_ACCESS_FLAGS |
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@@ -442,6 +463,9 @@ static const struct {
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.opt_param = {
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[UD] = (IB_QP_CUR_STATE |
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IB_QP_QKEY),
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+ [UC] = (IB_QP_ACCESS_FLAGS |
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+ IB_QP_ALT_PATH |
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+ IB_QP_PATH_MIG_STATE),
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[RC] = (IB_QP_ACCESS_FLAGS |
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IB_QP_ALT_PATH |
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IB_QP_PATH_MIG_STATE |
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@@ -462,6 +486,10 @@ static const struct {
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.opt_param = {
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[UD] = (IB_QP_CUR_STATE |
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IB_QP_QKEY),
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+ [UC] = (IB_QP_CUR_STATE |
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+ IB_QP_ALT_PATH |
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+ IB_QP_ACCESS_FLAGS |
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+ IB_QP_PATH_MIG_STATE),
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[RC] = (IB_QP_CUR_STATE |
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IB_QP_ALT_PATH |
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IB_QP_ACCESS_FLAGS |
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@@ -476,6 +504,14 @@ static const struct {
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.opt_param = {
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[UD] = (IB_QP_PKEY_INDEX |
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IB_QP_QKEY),
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+ [UC] = (IB_QP_AV |
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+ IB_QP_MAX_QP_RD_ATOMIC |
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+ IB_QP_MAX_DEST_RD_ATOMIC |
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+ IB_QP_CUR_STATE |
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+ IB_QP_ALT_PATH |
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+ IB_QP_ACCESS_FLAGS |
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+ IB_QP_PKEY_INDEX |
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+ IB_QP_PATH_MIG_STATE),
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[RC] = (IB_QP_AV |
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IB_QP_TIMEOUT |
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IB_QP_RETRY_CNT |
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@@ -501,6 +537,7 @@ static const struct {
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.opt_param = {
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[UD] = (IB_QP_CUR_STATE |
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IB_QP_QKEY),
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+ [UC] = (IB_QP_CUR_STATE),
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[RC] = (IB_QP_CUR_STATE |
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IB_QP_MIN_RNR_TIMER),
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[MLX] = (IB_QP_CUR_STATE |
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@@ -1530,6 +1567,26 @@ int mthca_tavor_post_send(struct ib_qp *ibqp, struct ib_send_wr *wr,
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break;
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+ case UC:
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+ switch (wr->opcode) {
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+ case IB_WR_RDMA_WRITE:
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+ case IB_WR_RDMA_WRITE_WITH_IMM:
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+ ((struct mthca_raddr_seg *) wqe)->raddr =
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+ cpu_to_be64(wr->wr.rdma.remote_addr);
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+ ((struct mthca_raddr_seg *) wqe)->rkey =
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+ cpu_to_be32(wr->wr.rdma.rkey);
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+ ((struct mthca_raddr_seg *) wqe)->reserved = 0;
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+ wqe += sizeof (struct mthca_raddr_seg);
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+ size += sizeof (struct mthca_raddr_seg) / 16;
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+ break;
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+
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+ default:
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+ /* No extra segments required for sends */
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+ break;
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+ }
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+
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+ break;
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+
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case UD:
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((struct mthca_tavor_ud_seg *) wqe)->lkey =
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cpu_to_be32(to_mah(wr->wr.ud.ah)->key);
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@@ -1815,9 +1872,29 @@ int mthca_arbel_post_send(struct ib_qp *ibqp, struct ib_send_wr *wr,
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sizeof (struct mthca_atomic_seg);
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break;
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+ case IB_WR_RDMA_READ:
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+ case IB_WR_RDMA_WRITE:
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+ case IB_WR_RDMA_WRITE_WITH_IMM:
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+ ((struct mthca_raddr_seg *) wqe)->raddr =
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+ cpu_to_be64(wr->wr.rdma.remote_addr);
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+ ((struct mthca_raddr_seg *) wqe)->rkey =
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+ cpu_to_be32(wr->wr.rdma.rkey);
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+ ((struct mthca_raddr_seg *) wqe)->reserved = 0;
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+ wqe += sizeof (struct mthca_raddr_seg);
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+ size += sizeof (struct mthca_raddr_seg) / 16;
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+ break;
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+
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+ default:
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+ /* No extra segments required for sends */
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+ break;
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+ }
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+
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+ break;
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+
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+ case UC:
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+ switch (wr->opcode) {
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case IB_WR_RDMA_WRITE:
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case IB_WR_RDMA_WRITE_WITH_IMM:
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- case IB_WR_RDMA_READ:
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((struct mthca_raddr_seg *) wqe)->raddr =
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cpu_to_be64(wr->wr.rdma.remote_addr);
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((struct mthca_raddr_seg *) wqe)->rkey =
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