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@@ -2286,7 +2286,7 @@ static s32 e1000_flash_cycle_init_ich8lan(struct e1000_hw *hw)
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}
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udelay(1);
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}
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- if (ret_val == 0) {
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+ if (!ret_val) {
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/*
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* Successful in waiting for previous cycle to timeout,
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* now set the Flash Cycle Done.
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@@ -2404,7 +2404,7 @@ static s32 e1000_read_flash_data_ich8lan(struct e1000_hw *hw, u32 offset,
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udelay(1);
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/* Steps */
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ret_val = e1000_flash_cycle_init_ich8lan(hw);
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- if (ret_val != 0)
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+ if (ret_val)
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break;
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hsflctl.regval = er16flash(ICH_FLASH_HSFCTL);
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@@ -2424,7 +2424,7 @@ static s32 e1000_read_flash_data_ich8lan(struct e1000_hw *hw, u32 offset,
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* read in (shift in) the Flash Data0, the order is
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* least significant byte first msb to lsb
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*/
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- if (ret_val == 0) {
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+ if (!ret_val) {
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flash_data = er32flash(ICH_FLASH_FDATA0);
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if (size == 1)
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*data = (u8)(flash_data & 0x000000FF);
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@@ -2936,7 +2936,7 @@ static s32 e1000_erase_flash_bank_ich8lan(struct e1000_hw *hw, u32 bank)
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ret_val = e1000_flash_cycle_ich8lan(hw,
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ICH_FLASH_ERASE_COMMAND_TIMEOUT);
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- if (ret_val == 0)
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+ if (!ret_val)
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break;
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/*
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