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@@ -32,6 +32,7 @@
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#define SN_SAL_NO_FAULT_ZONE_VIRTUAL 0x02000010
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#define SN_SAL_NO_FAULT_ZONE_PHYSICAL 0x02000011
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#define SN_SAL_PRINT_ERROR 0x02000012
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+#define SN_SAL_REGISTER_PMI_HANDLER 0x02000014
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#define SN_SAL_SET_ERROR_HANDLING_FEATURES 0x0200001a // reentrant
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#define SN_SAL_GET_FIT_COMPT 0x0200001b // reentrant
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#define SN_SAL_GET_SAPIC_INFO 0x0200001d
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@@ -679,6 +680,25 @@ sn_register_nofault_code(u64 start_addr, u64 end_addr, u64 return_addr,
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return ret_stuff.status;
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}
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+/*
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+ * Register or unregister a function to handle a PMI received by a CPU.
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+ * Before calling the registered handler, SAL sets r1 to the value that
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+ * was passed in as the global_pointer.
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+ *
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+ * If the handler pointer is NULL, then the currently registered handler
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+ * will be unregistered.
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+ *
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+ * Returns 0 on success, or a negative value if an error occurred.
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+ */
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+static inline int
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+sn_register_pmi_handler(u64 handler, u64 global_pointer)
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+{
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+ struct ia64_sal_retval ret_stuff;
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+ ia64_sal_oemcall(&ret_stuff, SN_SAL_REGISTER_PMI_HANDLER, handler,
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+ global_pointer, 0, 0, 0, 0, 0);
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+ return ret_stuff.status;
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+}
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+
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/*
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* Change or query the coherence domain for this partition. Each cpu-based
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* nasid is represented by a bit in an array of 64-bit words:
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