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@@ -549,47 +549,15 @@ static u8 ath9k_hw_chan_2_clockrate_mhz(struct ath_hw *ah)
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static int32_t ath9k_hw_ani_get_listen_time(struct ath_hw *ah)
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{
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- struct ar5416AniState *aniState;
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- struct ath_common *common = ath9k_hw_common(ah);
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- u32 txFrameCount, rxFrameCount, cycleCount;
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- int32_t listenTime;
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-
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- txFrameCount = REG_READ(ah, AR_TFCNT);
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- rxFrameCount = REG_READ(ah, AR_RFCNT);
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- cycleCount = REG_READ(ah, AR_CCCNT);
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-
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- aniState = ah->curani;
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- if (aniState->cycleCount == 0 || aniState->cycleCount > cycleCount) {
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- listenTime = 0;
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- ah->stats.ast_ani_lzero++;
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- ath_print(common, ATH_DBG_ANI,
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- "1st call: aniState->cycleCount=%d\n",
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- aniState->cycleCount);
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- } else {
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- int32_t ccdelta = cycleCount - aniState->cycleCount;
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- int32_t rfdelta = rxFrameCount - aniState->rxFrameCount;
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- int32_t tfdelta = txFrameCount - aniState->txFrameCount;
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- int32_t clock_rate;
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-
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- /*
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- * convert HW counter values to ms using mode
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- * specifix clock rate
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- */
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- clock_rate = ath9k_hw_chan_2_clockrate_mhz(ah) * 1000;;
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+ int32_t listen_time;
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+ int32_t clock_rate;
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- listenTime = (ccdelta - rfdelta - tfdelta) / clock_rate;
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+ ath9k_hw_update_cycle_counters(ah);
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+ clock_rate = ath9k_hw_chan_2_clockrate_mhz(ah) * 1000;
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+ listen_time = ah->listen_time / clock_rate;
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+ ah->listen_time = 0;
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- ath_print(common, ATH_DBG_ANI,
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- "cyclecount=%d, rfcount=%d, "
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- "tfcount=%d, listenTime=%d CLOCK_RATE=%d\n",
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- ccdelta, rfdelta, tfdelta, listenTime, clock_rate);
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- }
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-
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- aniState->cycleCount = cycleCount;
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- aniState->txFrameCount = txFrameCount;
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- aniState->rxFrameCount = rxFrameCount;
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-
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- return listenTime;
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+ return listen_time;
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}
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static void ath9k_ani_reset_old(struct ath_hw *ah, bool is_scanning)
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@@ -1041,45 +1009,52 @@ void ath9k_hw_disable_mib_counters(struct ath_hw *ah)
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}
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EXPORT_SYMBOL(ath9k_hw_disable_mib_counters);
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-u32 ath9k_hw_GetMibCycleCountsPct(struct ath_hw *ah,
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- u32 *rxc_pcnt,
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- u32 *rxf_pcnt,
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- u32 *txf_pcnt)
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+void ath9k_hw_update_cycle_counters(struct ath_hw *ah)
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{
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- struct ath_common *common = ath9k_hw_common(ah);
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- static u32 cycles, rx_clear, rx_frame, tx_frame;
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- u32 good = 1;
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+ struct ath_cycle_counters cc;
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+ bool clear;
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- u32 rc = REG_READ(ah, AR_RCCNT);
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- u32 rf = REG_READ(ah, AR_RFCNT);
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- u32 tf = REG_READ(ah, AR_TFCNT);
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- u32 cc = REG_READ(ah, AR_CCCNT);
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+ memcpy(&cc, &ah->cc, sizeof(cc));
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- if (cycles == 0 || cycles > cc) {
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- ath_print(common, ATH_DBG_ANI,
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- "cycle counter wrap. ExtBusy = 0\n");
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- good = 0;
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- } else {
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- u32 cc_d = cc - cycles;
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- u32 rc_d = rc - rx_clear;
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- u32 rf_d = rf - rx_frame;
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- u32 tf_d = tf - tx_frame;
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-
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- if (cc_d != 0) {
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- *rxc_pcnt = rc_d * 100 / cc_d;
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- *rxf_pcnt = rf_d * 100 / cc_d;
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- *txf_pcnt = tf_d * 100 / cc_d;
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- } else {
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- good = 0;
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- }
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+ /* freeze counters */
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+ REG_WRITE(ah, AR_MIBC, AR_MIBC_FMC);
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+
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+ ah->cc.cycles = REG_READ(ah, AR_CCCNT);
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+ if (ah->cc.cycles < cc.cycles) {
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+ clear = true;
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+ goto skip;
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}
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- cycles = cc;
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- rx_frame = rf;
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- rx_clear = rc;
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- tx_frame = tf;
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+ ah->cc.rx_clear = REG_READ(ah, AR_RCCNT);
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+ ah->cc.rx_frame = REG_READ(ah, AR_RFCNT);
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+ ah->cc.tx_frame = REG_READ(ah, AR_TFCNT);
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+
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+ /* prevent wraparound */
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+ if (ah->cc.cycles & BIT(31))
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+ clear = true;
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+
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+#define CC_DELTA(_field, _reg) ah->cc_delta._field += ah->cc._field - cc._field
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+ CC_DELTA(cycles, AR_CCCNT);
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+ CC_DELTA(rx_frame, AR_RFCNT);
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+ CC_DELTA(rx_clear, AR_RCCNT);
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+ CC_DELTA(tx_frame, AR_TFCNT);
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+#undef CC_DELTA
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+
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+ ah->listen_time += (ah->cc.cycles - cc.cycles) -
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+ ((ah->cc.rx_frame - cc.rx_frame) +
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+ (ah->cc.tx_frame - cc.tx_frame));
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+
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+skip:
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+ if (clear) {
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+ REG_WRITE(ah, AR_CCCNT, 0);
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+ REG_WRITE(ah, AR_RFCNT, 0);
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+ REG_WRITE(ah, AR_RCCNT, 0);
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+ REG_WRITE(ah, AR_TFCNT, 0);
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+ memset(&ah->cc, 0, sizeof(ah->cc));
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+ }
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- return good;
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+ /* unfreeze counters */
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+ REG_WRITE(ah, AR_MIBC, 0);
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}
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/*
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