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+/* linux/arch/arm/mach-s3c2410/mach-jive.c
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+ *
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+ * Copyright 2007 Simtec Electronics
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+ * Ben Dooks <ben@simtec.co.uk>
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+ *
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+ * http://armlinux.simtec.co.uk/
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+ *
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+ * This program is free software; you can redistribute it and/or modify
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+ * it under the terms of the GNU General Public License version 2 as
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+ * published by the Free Software Foundation.
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+*/
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+
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+#include <linux/kernel.h>
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+#include <linux/types.h>
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+#include <linux/interrupt.h>
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+#include <linux/list.h>
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+#include <linux/timer.h>
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+#include <linux/init.h>
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+#include <linux/sysdev.h>
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+#include <linux/serial_core.h>
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+#include <linux/platform_device.h>
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+
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+#include <linux/mtd/mtd.h>
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+#include <linux/mtd/partitions.h>
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+
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+#include <asm/mach/arch.h>
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+#include <asm/mach/map.h>
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+#include <asm/mach/irq.h>
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+
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+#include <asm/plat-s3c/regs-serial.h>
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+#include <asm/plat-s3c/nand.h>
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+
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+#include <asm/arch/regs-power.h>
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+#include <asm/arch/regs-gpio.h>
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+#include <asm/arch/regs-mem.h>
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+#include <asm/arch/regs-lcd.h>
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+
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+#include <asm/mach-types.h>
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+
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+#include <linux/mtd/mtd.h>
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+#include <linux/mtd/nand.h>
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+#include <linux/mtd/nand_ecc.h>
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+#include <linux/mtd/partitions.h>
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+
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+#include <asm/plat-s3c24xx/clock.h>
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+#include <asm/plat-s3c24xx/devs.h>
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+#include <asm/plat-s3c24xx/cpu.h>
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+#include <asm/plat-s3c24xx/pm.h>
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+#include <asm/plat-s3c24xx/udc.h>
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+
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+static struct map_desc jive_iodesc[] __initdata = {
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+};
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+
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+#define UCON S3C2410_UCON_DEFAULT
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+#define ULCON S3C2410_LCON_CS8 | S3C2410_LCON_PNONE
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+#define UFCON S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE
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+
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+static struct s3c2410_uartcfg jive_uartcfgs[] = {
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+ [0] = {
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+ .hwport = 0,
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+ .flags = 0,
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+ .ucon = UCON,
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+ .ulcon = ULCON,
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+ .ufcon = UFCON,
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+ },
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+ [1] = {
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+ .hwport = 1,
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+ .flags = 0,
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+ .ucon = UCON,
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+ .ulcon = ULCON,
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+ .ufcon = UFCON,
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+ },
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+ [2] = {
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+ .hwport = 2,
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+ .flags = 0,
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+ .ucon = UCON,
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+ .ulcon = ULCON,
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+ .ufcon = UFCON,
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+ }
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+};
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+
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+/* Jive flash assignment
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+ *
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+ * 0x00000000-0x00028000 : uboot
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+ * 0x00028000-0x0002c000 : uboot env
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+ * 0x0002c000-0x00030000 : spare
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+ * 0x00030000-0x00200000 : zimage A
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+ * 0x00200000-0x01600000 : cramfs A
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+ * 0x01600000-0x017d0000 : zimage B
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+ * 0x017d0000-0x02bd0000 : cramfs B
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+ * 0x02bd0000-0x03fd0000 : yaffs
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+ */
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+static struct mtd_partition jive_imageA_nand_part[] = {
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+
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+#ifdef CONFIG_MACH_JIVE_SHOW_BOOTLOADER
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+ /* Don't allow access to the bootloader from linux */
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+ {
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+ .name = "uboot",
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+ .offset = 0,
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+ .size = (160 * SZ_1K),
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+ .mask_flags = MTD_WRITEABLE, /* force read-only */
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+ },
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+
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+ /* spare */
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+ {
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+ .name = "spare",
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+ .offset = (176 * SZ_1K),
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+ .size = (16 * SZ_1K),
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+ },
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+#endif
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+
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+ /* booted images */
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+ {
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+ .name = "kernel (ro)",
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+ .offset = (192 * SZ_1K),
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+ .size = (SZ_2M) - (192 * SZ_1K),
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+ .mask_flags = MTD_WRITEABLE, /* force read-only */
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+ }, {
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+ .name = "root (ro)",
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+ .offset = (SZ_2M),
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+ .size = (20 * SZ_1M),
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+ .mask_flags = MTD_WRITEABLE, /* force read-only */
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+ },
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+
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+ /* yaffs */
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+ {
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+ .name = "yaffs",
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+ .offset = (44 * SZ_1M),
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+ .size = (20 * SZ_1M),
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+ },
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+
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+ /* bootloader environment */
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+ {
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+ .name = "env",
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+ .offset = (160 * SZ_1K),
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+ .size = (16 * SZ_1K),
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+ },
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+
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+ /* upgrade images */
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+ {
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+ .name = "zimage",
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+ .offset = (22 * SZ_1M),
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+ .size = (2 * SZ_1M) - (192 * SZ_1K),
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+ }, {
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+ .name = "cramfs",
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+ .offset = (24 * SZ_1M) - (192*SZ_1K),
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+ .size = (20 * SZ_1M),
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+ },
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+};
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+
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+static struct mtd_partition jive_imageB_nand_part[] = {
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+
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+#ifdef CONFIG_MACH_JIVE_SHOW_BOOTLOADER
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+ /* Don't allow access to the bootloader from linux */
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+ {
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+ .name = "uboot",
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+ .offset = 0,
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+ .size = (160 * SZ_1K),
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+ .mask_flags = MTD_WRITEABLE, /* force read-only */
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+ },
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+
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+ /* spare */
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+ {
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+ .name = "spare",
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+ .offset = (176 * SZ_1K),
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+ .size = (16 * SZ_1K),
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+ },
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+#endif
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+
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+ /* booted images */
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+ {
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+ .name = "kernel (ro)",
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+ .offset = (22 * SZ_1M),
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+ .size = (2 * SZ_1M) - (192 * SZ_1K),
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+ .mask_flags = MTD_WRITEABLE, /* force read-only */
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+ },
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+ {
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+ .name = "root (ro)",
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+ .offset = (24 * SZ_1M) - (192 * SZ_1K),
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+ .size = (20 * SZ_1M),
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+ .mask_flags = MTD_WRITEABLE, /* force read-only */
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+ },
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+
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+ /* yaffs */
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+ {
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+ .name = "yaffs",
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+ .offset = (44 * SZ_1M),
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+ .size = (20 * SZ_1M),
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+ },
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+
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+ /* bootloader environment */
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+ {
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+ .name = "env",
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+ .offset = (160 * SZ_1K),
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+ .size = (16 * SZ_1K),
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+ },
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+
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+ /* upgrade images */
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+ {
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+ .name = "zimage",
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+ .offset = (192 * SZ_1K),
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+ .size = (2 * SZ_1M) - (192 * SZ_1K),
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+ }, {
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+ .name = "cramfs",
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+ .offset = (2 * SZ_1M),
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+ .size = (20 * SZ_1M),
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+ },
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+};
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+
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+static struct s3c2410_nand_set jive_nand_sets[] = {
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+ [0] = {
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+ .name = "flash",
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+ .nr_chips = 1,
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+ .nr_partitions = ARRAY_SIZE(jive_imageA_nand_part),
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+ .partitions = jive_imageA_nand_part,
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+ },
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+};
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+
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+static struct s3c2410_platform_nand jive_nand_info = {
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+ /* set taken from osiris nand timings, possibly still conservative */
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+ .tacls = 30,
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+ .twrph0 = 55,
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+ .twrph1 = 40,
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+ .sets = jive_nand_sets,
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+ .nr_sets = ARRAY_SIZE(jive_nand_sets),
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+};
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+
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+static int __init jive_mtdset(char *options)
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+{
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+ struct s3c2410_nand_set *nand = &jive_nand_sets[0];
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+ unsigned long set;
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+
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+ if (options == NULL || options[0] == '\0')
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+ return 0;
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+
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+ if (strict_strtoul(options, 10, &set)) {
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+ printk(KERN_ERR "failed to parse mtdset=%s\n", options);
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+ return 0;
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+ }
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+
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+ switch (set) {
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+ case 1:
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+ nand->nr_partitions = ARRAY_SIZE(jive_imageB_nand_part);
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+ nand->partitions = jive_imageB_nand_part;
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+ case 0:
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+ /* this is already setup in the nand info */
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+ break;
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+ default:
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+ printk(KERN_ERR "Unknown mtd set %ld specified,"
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+ "using default.", set);
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+ }
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+
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+ return 0;
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+}
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+
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+/* parse the mtdset= option given to the kernel command line */
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+__setup("mtdset=", jive_mtdset);
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+
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+static struct platform_device *jive_devices[] __initdata = {
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+ &s3c_device_usb,
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+ &s3c_device_rtc,
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+ &s3c_device_wdt,
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+ &s3c_device_i2c,
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+ &s3c_device_nand,
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+ &s3c_device_usbgadget,
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+};
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+
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+static struct s3c2410_udc_mach_info jive_udc_cfg __initdata = {
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+ .vbus_pin = S3C2410_GPG1, /* detect is on GPG1 */
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+};
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+
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+/* Jive power management device */
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+
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+#ifdef CONFIG_PM
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+static int jive_pm_suspend(struct sys_device *sd, pm_message_t state)
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+{
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+ /* Write the magic value u-boot uses to check for resume into
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+ * the INFORM0 register, and ensure INFORM1 is set to the
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+ * correct address to resume from. */
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+
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+ __raw_writel(0x2BED, S3C2412_INFORM0);
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+ __raw_writel(virt_to_phys(s3c2410_cpu_resume), S3C2412_INFORM1);
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+
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+ return 0;
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+}
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+
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+static int jive_pm_resume(struct sys_device *sd)
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+{
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+ __raw_writel(0x0, S3C2412_INFORM0);
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+ return 0;
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+}
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+
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+#else
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+#define jive_pm_suspend NULL
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+#define jive_pm_resume NULL
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+#endif
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+
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+static struct sysdev_class jive_pm_sysclass = {
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+ .name = "jive-pm",
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+ .suspend = jive_pm_suspend,
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+ .resume = jive_pm_resume,
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+};
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+
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+static struct sys_device jive_pm_sysdev = {
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+ .cls = &jive_pm_sysclass,
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+};
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+
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+static void __init jive_map_io(void)
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+{
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+ s3c24xx_init_io(jive_iodesc, ARRAY_SIZE(jive_iodesc));
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+ s3c24xx_init_clocks(12000000);
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+ s3c24xx_init_uarts(jive_uartcfgs, ARRAY_SIZE(jive_uartcfgs));
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+}
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+
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+static void __init jive_machine_init(void)
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+{
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+ /* register system devices for managing low level suspend */
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+
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+ sysdev_class_register(&jive_pm_sysclass);
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+ sysdev_register(&jive_pm_sysdev);
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+
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+ s3c2410_pm_init();
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+
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+ s3c_device_nand.dev.platform_data = &jive_nand_info;
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+
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+ /* Turn off suspend on both USB ports, and switch the
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+ * selectable USB port to USB device mode. */
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+
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+ s3c2410_modify_misccr(S3C2410_MISCCR_USBHOST |
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+ S3C2410_MISCCR_USBSUSPND0 |
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+ S3C2410_MISCCR_USBSUSPND1, 0x0);
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+
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+ s3c24xx_udc_set_platdata(&jive_udc_cfg);
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+
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+ platform_add_devices(jive_devices, ARRAY_SIZE(jive_devices));
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+}
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+
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+MACHINE_START(JIVE, "JIVE")
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+ /* Maintainer: Ben Dooks <ben@fluff.org> */
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+ .phys_io = S3C2410_PA_UART,
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+ .io_pg_offst = (((u32)S3C24XX_VA_UART) >> 18) & 0xfffc,
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+ .boot_params = S3C2410_SDRAM_PA + 0x100,
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+
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+ .init_irq = s3c24xx_init_irq,
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+ .map_io = jive_map_io,
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+ .init_machine = jive_machine_init,
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+ .timer = &s3c24xx_timer,
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+MACHINE_END
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