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@@ -118,22 +118,6 @@ enum {
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PIIX_80C_PRI = (1 << 5) | (1 << 4),
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PIIX_80C_SEC = (1 << 7) | (1 << 6),
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- /* controller IDs */
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- piix_pata_mwdma = 0, /* PIIX3 MWDMA only */
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- piix_pata_33, /* PIIX4 at 33Mhz */
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- ich_pata_33, /* ICH up to UDMA 33 only */
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- ich_pata_66, /* ICH up to 66 Mhz */
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- ich_pata_100, /* ICH up to UDMA 100 */
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- ich5_sata,
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- ich6_sata,
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- ich6_sata_ahci,
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- ich6m_sata_ahci,
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- ich8_sata_ahci,
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- ich8_2port_sata,
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- ich8m_apple_sata_ahci, /* locks up on second port enable */
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- tolapai_sata_ahci,
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- piix_pata_vmw, /* PIIX4 for VMware, spurious DMA_ERR */
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-
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/* constants for mapping table */
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P0 = 0, /* port 0 */
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P1 = 1, /* port 1 */
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@@ -149,6 +133,24 @@ enum {
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PIIX_HOST_BROKEN_SUSPEND = (1 << 24),
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};
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+enum piix_controller_ids {
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+ /* controller IDs */
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+ piix_pata_mwdma, /* PIIX3 MWDMA only */
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+ piix_pata_33, /* PIIX4 at 33Mhz */
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+ ich_pata_33, /* ICH up to UDMA 33 only */
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+ ich_pata_66, /* ICH up to 66 Mhz */
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+ ich_pata_100, /* ICH up to UDMA 100 */
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+ ich5_sata,
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+ ich6_sata,
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+ ich6_sata_ahci,
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+ ich6m_sata_ahci,
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+ ich8_sata_ahci,
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+ ich8_2port_sata,
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+ ich8m_apple_sata_ahci, /* locks up on second port enable */
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+ tolapai_sata_ahci,
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+ piix_pata_vmw, /* PIIX4 for VMware, spurious DMA_ERR */
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+};
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+
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struct piix_map_db {
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const u32 mask;
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const u16 port_enable;
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