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@@ -6989,6 +6989,11 @@ static void ironlake_write_eld(struct drm_connector *connector,
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aud_config = IBX_AUD_CFG(pipe);
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aud_cntl_st = IBX_AUD_CNTL_ST(pipe);
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aud_cntrl_st2 = IBX_AUD_CNTL_ST2;
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+ } else if (IS_VALLEYVIEW(connector->dev)) {
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+ hdmiw_hdmiedid = VLV_HDMIW_HDMIEDID(pipe);
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+ aud_config = VLV_AUD_CFG(pipe);
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+ aud_cntl_st = VLV_AUD_CNTL_ST(pipe);
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+ aud_cntrl_st2 = VLV_AUD_CNTL_ST2;
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} else {
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hdmiw_hdmiedid = CPT_HDMIW_HDMIEDID(pipe);
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aud_config = CPT_AUD_CFG(pipe);
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@@ -6998,8 +7003,19 @@ static void ironlake_write_eld(struct drm_connector *connector,
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DRM_DEBUG_DRIVER("ELD on pipe %c\n", pipe_name(pipe));
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- i = I915_READ(aud_cntl_st);
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- i = (i >> 29) & DIP_PORT_SEL_MASK; /* DIP_Port_Select, 0x1 = PortB */
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+ if (IS_VALLEYVIEW(connector->dev)) {
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+ struct intel_encoder *intel_encoder;
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+ struct intel_digital_port *intel_dig_port;
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+
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+ intel_encoder = intel_attached_encoder(connector);
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+ intel_dig_port = enc_to_dig_port(&intel_encoder->base);
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+ i = intel_dig_port->port;
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+ } else {
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+ i = I915_READ(aud_cntl_st);
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+ i = (i >> 29) & DIP_PORT_SEL_MASK;
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+ /* DIP_Port_Select, 0x1 = PortB */
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+ }
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+
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if (!i) {
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DRM_DEBUG_DRIVER("Audio directed to unknown port\n");
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/* operate blindly on all ports */
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@@ -10317,7 +10333,8 @@ static void intel_init_display(struct drm_device *dev)
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}
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} else if (IS_G4X(dev)) {
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dev_priv->display.write_eld = g4x_write_eld;
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- }
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+ } else if (IS_VALLEYVIEW(dev))
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+ dev_priv->display.write_eld = ironlake_write_eld;
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/* Default just returns -ENODEV to indicate unsupported */
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dev_priv->display.queue_flip = intel_default_queue_flip;
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