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@@ -186,38 +186,44 @@ EXPORT_SYMBOL_GPL(rt2x00pci_txdone);
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/*
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/*
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* Device initialization handlers.
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* Device initialization handlers.
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*/
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*/
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-#define dma_size(__queue) \
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-({ \
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- (__queue)->limit * \
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- ((__queue)->desc_size + (__queue)->data_size);\
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+#define desc_size(__queue) \
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+({ \
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+ ((__queue)->limit * (__queue)->desc_size);\
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})
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})
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-#define priv_offset(__queue, __base, __i) \
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-({ \
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- (__base) + ((__i) * (__queue)->desc_size); \
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+#define data_size(__queue) \
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+({ \
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+ ((__queue)->limit * (__queue)->data_size);\
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})
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})
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-#define data_addr_offset(__queue, __base, __i) \
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-({ \
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- (__base) + \
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- ((__queue)->limit * (__queue)->desc_size) + \
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- ((__i) * (__queue)->data_size); \
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+#define dma_size(__queue) \
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+({ \
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+ data_size(__queue) + desc_size(__queue);\
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})
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})
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-#define data_dma_offset(__queue, __base, __i) \
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-({ \
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- (__base) + \
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- ((__queue)->limit * (__queue)->desc_size) + \
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- ((__i) * (__queue)->data_size); \
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+#define desc_offset(__queue, __base, __i) \
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+({ \
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+ (__base) + data_size(__queue) + \
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+ ((__i) * (__queue)->desc_size); \
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+})
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+
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+#define data_offset(__queue, __base, __i) \
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+({ \
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+ (__base) + \
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+ ((__i) * (__queue)->data_size); \
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})
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})
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static int rt2x00pci_alloc_queue_dma(struct rt2x00_dev *rt2x00dev,
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static int rt2x00pci_alloc_queue_dma(struct rt2x00_dev *rt2x00dev,
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struct data_queue *queue)
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struct data_queue *queue)
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{
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{
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struct pci_dev *pci_dev = rt2x00dev_pci(rt2x00dev);
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struct pci_dev *pci_dev = rt2x00dev_pci(rt2x00dev);
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+ struct queue_entry_priv_pci_rx *priv_rx;
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struct queue_entry_priv_pci_tx *priv_tx;
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struct queue_entry_priv_pci_tx *priv_tx;
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+ void *desc;
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void *data_addr;
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void *data_addr;
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+ void *data;
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dma_addr_t data_dma;
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dma_addr_t data_dma;
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+ dma_addr_t dma;
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unsigned int i;
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unsigned int i;
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/*
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/*
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@@ -227,14 +233,27 @@ static int rt2x00pci_alloc_queue_dma(struct rt2x00_dev *rt2x00dev,
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if (!data_addr)
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if (!data_addr)
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return -ENOMEM;
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return -ENOMEM;
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+ memset(data_addr, 0, dma_size(queue));
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+
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/*
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/*
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* Initialize all queue entries to contain valid addresses.
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* Initialize all queue entries to contain valid addresses.
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*/
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*/
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for (i = 0; i < queue->limit; i++) {
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for (i = 0; i < queue->limit; i++) {
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- priv_tx = queue->entries[i].priv_data;
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- priv_tx->desc = priv_offset(queue, data_addr, i);
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- priv_tx->data = data_addr_offset(queue, data_addr, i);
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- priv_tx->dma = data_dma_offset(queue, data_dma, i);
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+ desc = desc_offset(queue, data_addr, i);
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+ data = data_offset(queue, data_addr, i);
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+ dma = data_offset(queue, data_dma, i);
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+
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+ if (queue->qid == QID_RX) {
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+ priv_rx = queue->entries[i].priv_data;
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+ priv_rx->desc = desc;
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+ priv_rx->data = data;
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+ priv_rx->dma = dma;
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+ } else {
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+ priv_tx = queue->entries[i].priv_data;
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+ priv_tx->desc = desc;
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+ priv_tx->data = data;
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+ priv_tx->dma = dma;
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+ }
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}
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}
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return 0;
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return 0;
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@@ -244,12 +263,28 @@ static void rt2x00pci_free_queue_dma(struct rt2x00_dev *rt2x00dev,
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struct data_queue *queue)
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struct data_queue *queue)
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{
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{
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struct pci_dev *pci_dev = rt2x00dev_pci(rt2x00dev);
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struct pci_dev *pci_dev = rt2x00dev_pci(rt2x00dev);
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- struct queue_entry_priv_pci_tx *priv_tx = queue->entries[0].priv_data;
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+ struct queue_entry_priv_pci_rx *priv_rx;
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+ struct queue_entry_priv_pci_tx *priv_tx;
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+ void *data_addr;
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+ dma_addr_t data_dma;
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+
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+ if (queue->qid == QID_RX) {
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+ priv_rx = queue->entries[0].priv_data;
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+ data_addr = priv_rx->data;
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+ data_dma = priv_rx->dma;
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+
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+ priv_rx->data = NULL;
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+ } else {
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+ priv_tx = queue->entries[0].priv_data;
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+ data_addr = priv_tx->data;
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+ data_dma = priv_tx->dma;
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+
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+ priv_tx->data = NULL;
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+ }
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- if (priv_tx->data)
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+ if (data_addr)
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pci_free_consistent(pci_dev, dma_size(queue),
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pci_free_consistent(pci_dev, dma_size(queue),
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- priv_tx->data, priv_tx->dma);
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- priv_tx->data = NULL;
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+ data_addr, data_dma);
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}
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}
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int rt2x00pci_initialize(struct rt2x00_dev *rt2x00dev)
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int rt2x00pci_initialize(struct rt2x00_dev *rt2x00dev)
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