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@@ -1,28 +1,32 @@
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-/* pci_iommu.c: UltraSparc PCI controller IOM/STC support.
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+/* iommu.c: Generic sparc64 IOMMU support.
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*
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* Copyright (C) 1999, 2007 David S. Miller (davem@davemloft.net)
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* Copyright (C) 1999, 2000 Jakub Jelinek (jakub@redhat.com)
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*/
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#include <linux/kernel.h>
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-#include <linux/sched.h>
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-#include <linux/mm.h>
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+#include <linux/module.h>
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#include <linux/delay.h>
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+#include <linux/device.h>
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+#include <linux/dma-mapping.h>
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+#include <linux/errno.h>
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+
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+#ifdef CONFIG_PCI
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#include <linux/pci.h>
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+#endif
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-#include <asm/oplib.h>
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+#include <asm/iommu.h>
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#include "iommu_common.h"
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-#include "pci_impl.h"
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-#define PCI_STC_CTXMATCH_ADDR(STC, CTX) \
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+#define STC_CTXMATCH_ADDR(STC, CTX) \
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((STC)->strbuf_ctxmatch_base + ((CTX) << 3))
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+#define STC_FLUSHFLAG_INIT(STC) \
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+ (*((STC)->strbuf_flushflag) = 0UL)
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+#define STC_FLUSHFLAG_SET(STC) \
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+ (*((STC)->strbuf_flushflag) != 0UL)
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-/* Accessing IOMMU and Streaming Buffer registers.
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- * REG parameter is a physical address. All registers
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- * are 64-bits in size.
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- */
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-#define pci_iommu_read(__reg) \
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+#define iommu_read(__reg) \
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({ u64 __ret; \
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__asm__ __volatile__("ldxa [%1] %2, %0" \
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: "=r" (__ret) \
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@@ -30,7 +34,7 @@
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: "memory"); \
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__ret; \
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})
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-#define pci_iommu_write(__reg, __val) \
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+#define iommu_write(__reg, __val) \
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__asm__ __volatile__("stxa %0, [%1] %2" \
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: /* no outputs */ \
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: "r" (__val), "r" (__reg), \
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@@ -40,19 +44,19 @@
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static void __iommu_flushall(struct iommu *iommu)
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{
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if (iommu->iommu_flushinv) {
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- pci_iommu_write(iommu->iommu_flushinv, ~(u64)0);
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+ iommu_write(iommu->iommu_flushinv, ~(u64)0);
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} else {
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unsigned long tag;
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int entry;
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- tag = iommu->iommu_flush + (0xa580UL - 0x0210UL);
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+ tag = iommu->iommu_tags;
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for (entry = 0; entry < 16; entry++) {
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- pci_iommu_write(tag, 0);
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+ iommu_write(tag, 0);
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tag += 8;
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}
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/* Ensure completion of previous PIO writes. */
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- (void) pci_iommu_read(iommu->write_complete_reg);
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+ (void) iommu_read(iommu->write_complete_reg);
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}
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}
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@@ -80,7 +84,7 @@ static inline void iopte_make_dummy(struct iommu *iommu, iopte_t *iopte)
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}
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/* Based largely upon the ppc64 iommu allocator. */
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-static long pci_arena_alloc(struct iommu *iommu, unsigned long npages)
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+static long arena_alloc(struct iommu *iommu, unsigned long npages)
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{
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struct iommu_arena *arena = &iommu->arena;
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unsigned long n, i, start, end, limit;
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@@ -121,7 +125,7 @@ again:
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return n;
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}
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-static void pci_arena_free(struct iommu_arena *arena, unsigned long base, unsigned long npages)
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+static void arena_free(struct iommu_arena *arena, unsigned long base, unsigned long npages)
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{
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unsigned long i;
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@@ -129,7 +133,8 @@ static void pci_arena_free(struct iommu_arena *arena, unsigned long base, unsign
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__clear_bit(i, arena->map);
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}
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-void pci_iommu_table_init(struct iommu *iommu, int tsbsize, u32 dma_offset, u32 dma_addr_mask)
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+int iommu_table_init(struct iommu *iommu, int tsbsize,
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+ u32 dma_offset, u32 dma_addr_mask)
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{
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unsigned long i, tsbbase, order, sz, num_tsb_entries;
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@@ -146,8 +151,8 @@ void pci_iommu_table_init(struct iommu *iommu, int tsbsize, u32 dma_offset, u32
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sz = (sz + 7UL) & ~7UL;
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iommu->arena.map = kzalloc(sz, GFP_KERNEL);
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if (!iommu->arena.map) {
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- prom_printf("PCI_IOMMU: Error, kmalloc(arena.map) failed.\n");
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- prom_halt();
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+ printk(KERN_ERR "IOMMU: Error, kmalloc(arena.map) failed.\n");
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+ return -ENOMEM;
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}
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iommu->arena.limit = num_tsb_entries;
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@@ -156,8 +161,8 @@ void pci_iommu_table_init(struct iommu *iommu, int tsbsize, u32 dma_offset, u32
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*/
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iommu->dummy_page = __get_free_pages(GFP_KERNEL, 0);
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if (!iommu->dummy_page) {
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- prom_printf("PCI_IOMMU: Error, gfp(dummy_page) failed.\n");
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- prom_halt();
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+ printk(KERN_ERR "IOMMU: Error, gfp(dummy_page) failed.\n");
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+ goto out_free_map;
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}
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memset((void *)iommu->dummy_page, 0, PAGE_SIZE);
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iommu->dummy_page_pa = (unsigned long) __pa(iommu->dummy_page);
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@@ -166,20 +171,32 @@ void pci_iommu_table_init(struct iommu *iommu, int tsbsize, u32 dma_offset, u32
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order = get_order(tsbsize);
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tsbbase = __get_free_pages(GFP_KERNEL, order);
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if (!tsbbase) {
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- prom_printf("PCI_IOMMU: Error, gfp(tsb) failed.\n");
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- prom_halt();
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+ printk(KERN_ERR "IOMMU: Error, gfp(tsb) failed.\n");
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+ goto out_free_dummy_page;
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}
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iommu->page_table = (iopte_t *)tsbbase;
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for (i = 0; i < num_tsb_entries; i++)
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iopte_make_dummy(iommu, &iommu->page_table[i]);
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+
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+ return 0;
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+
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+out_free_dummy_page:
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+ free_page(iommu->dummy_page);
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+ iommu->dummy_page = 0UL;
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+
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+out_free_map:
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+ kfree(iommu->arena.map);
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+ iommu->arena.map = NULL;
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+
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+ return -ENOMEM;
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}
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static inline iopte_t *alloc_npages(struct iommu *iommu, unsigned long npages)
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{
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long entry;
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- entry = pci_arena_alloc(iommu, npages);
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+ entry = arena_alloc(iommu, npages);
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if (unlikely(entry < 0))
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return NULL;
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@@ -188,7 +205,7 @@ static inline iopte_t *alloc_npages(struct iommu *iommu, unsigned long npages)
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static inline void free_npages(struct iommu *iommu, dma_addr_t base, unsigned long npages)
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{
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- pci_arena_free(&iommu->arena, base >> IO_PAGE_SHIFT, npages);
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+ arena_free(&iommu->arena, base >> IO_PAGE_SHIFT, npages);
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}
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static int iommu_alloc_ctx(struct iommu *iommu)
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@@ -219,11 +236,8 @@ static inline void iommu_free_ctx(struct iommu *iommu, int ctx)
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}
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}
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-/* Allocate and map kernel buffer of size SIZE using consistent mode
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- * DMA for PCI device PDEV. Return non-NULL cpu-side address if
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- * successful and set *DMA_ADDRP to the PCI side dma address.
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- */
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-static void *pci_4u_alloc_consistent(struct pci_dev *pdev, size_t size, dma_addr_t *dma_addrp, gfp_t gfp)
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+static void *dma_4u_alloc_coherent(struct device *dev, size_t size,
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+ dma_addr_t *dma_addrp, gfp_t gfp)
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{
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struct iommu *iommu;
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iopte_t *iopte;
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@@ -241,7 +255,7 @@ static void *pci_4u_alloc_consistent(struct pci_dev *pdev, size_t size, dma_addr
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return NULL;
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memset((char *)first_page, 0, PAGE_SIZE << order);
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- iommu = pdev->dev.archdata.iommu;
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+ iommu = dev->archdata.iommu;
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spin_lock_irqsave(&iommu->lock, flags);
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iopte = alloc_npages(iommu, size >> IO_PAGE_SHIFT);
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@@ -268,15 +282,15 @@ static void *pci_4u_alloc_consistent(struct pci_dev *pdev, size_t size, dma_addr
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return ret;
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}
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-/* Free and unmap a consistent DMA translation. */
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-static void pci_4u_free_consistent(struct pci_dev *pdev, size_t size, void *cpu, dma_addr_t dvma)
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+static void dma_4u_free_coherent(struct device *dev, size_t size,
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+ void *cpu, dma_addr_t dvma)
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{
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struct iommu *iommu;
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iopte_t *iopte;
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unsigned long flags, order, npages;
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npages = IO_PAGE_ALIGN(size) >> IO_PAGE_SHIFT;
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- iommu = pdev->dev.archdata.iommu;
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+ iommu = dev->archdata.iommu;
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iopte = iommu->page_table +
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((dvma - iommu->page_table_map_base) >> IO_PAGE_SHIFT);
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@@ -291,10 +305,8 @@ static void pci_4u_free_consistent(struct pci_dev *pdev, size_t size, void *cpu,
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free_pages((unsigned long)cpu, order);
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}
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-/* Map a single buffer at PTR of SZ bytes for PCI DMA
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- * in streaming mode.
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- */
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-static dma_addr_t pci_4u_map_single(struct pci_dev *pdev, void *ptr, size_t sz, int direction)
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+static dma_addr_t dma_4u_map_single(struct device *dev, void *ptr, size_t sz,
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+ enum dma_data_direction direction)
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{
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struct iommu *iommu;
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struct strbuf *strbuf;
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@@ -304,10 +316,10 @@ static dma_addr_t pci_4u_map_single(struct pci_dev *pdev, void *ptr, size_t sz,
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u32 bus_addr, ret;
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unsigned long iopte_protection;
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- iommu = pdev->dev.archdata.iommu;
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- strbuf = pdev->dev.archdata.stc;
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+ iommu = dev->archdata.iommu;
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+ strbuf = dev->archdata.stc;
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- if (unlikely(direction == PCI_DMA_NONE))
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+ if (unlikely(direction == DMA_NONE))
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goto bad_no_ctx;
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oaddr = (unsigned long)ptr;
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@@ -332,7 +344,7 @@ static dma_addr_t pci_4u_map_single(struct pci_dev *pdev, void *ptr, size_t sz,
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iopte_protection = IOPTE_STREAMING(ctx);
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else
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iopte_protection = IOPTE_CONSISTENT(ctx);
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- if (direction != PCI_DMA_TODEVICE)
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+ if (direction != DMA_TO_DEVICE)
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iopte_protection |= IOPTE_WRITE;
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for (i = 0; i < npages; i++, base++, base_paddr += IO_PAGE_SIZE)
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@@ -345,10 +357,12 @@ bad:
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bad_no_ctx:
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if (printk_ratelimit())
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WARN_ON(1);
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- return PCI_DMA_ERROR_CODE;
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+ return DMA_ERROR_CODE;
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}
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-static void pci_strbuf_flush(struct strbuf *strbuf, struct iommu *iommu, u32 vaddr, unsigned long ctx, unsigned long npages, int direction)
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+static void strbuf_flush(struct strbuf *strbuf, struct iommu *iommu,
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+ u32 vaddr, unsigned long ctx, unsigned long npages,
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+ enum dma_data_direction direction)
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{
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int limit;
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@@ -358,22 +372,22 @@ static void pci_strbuf_flush(struct strbuf *strbuf, struct iommu *iommu, u32 vad
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u64 val;
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flushreg = strbuf->strbuf_ctxflush;
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- matchreg = PCI_STC_CTXMATCH_ADDR(strbuf, ctx);
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+ matchreg = STC_CTXMATCH_ADDR(strbuf, ctx);
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- pci_iommu_write(flushreg, ctx);
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- val = pci_iommu_read(matchreg);
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+ iommu_write(flushreg, ctx);
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+ val = iommu_read(matchreg);
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val &= 0xffff;
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if (!val)
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goto do_flush_sync;
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while (val) {
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if (val & 0x1)
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- pci_iommu_write(flushreg, ctx);
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+ iommu_write(flushreg, ctx);
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val >>= 1;
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}
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- val = pci_iommu_read(matchreg);
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+ val = iommu_read(matchreg);
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if (unlikely(val)) {
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- printk(KERN_WARNING "pci_strbuf_flush: ctx flush "
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+ printk(KERN_WARNING "strbuf_flush: ctx flush "
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"timeout matchreg[%lx] ctx[%lx]\n",
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val, ctx);
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goto do_page_flush;
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@@ -383,7 +397,7 @@ static void pci_strbuf_flush(struct strbuf *strbuf, struct iommu *iommu, u32 vad
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do_page_flush:
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for (i = 0; i < npages; i++, vaddr += IO_PAGE_SIZE)
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- pci_iommu_write(strbuf->strbuf_pflush, vaddr);
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+ iommu_write(strbuf->strbuf_pflush, vaddr);
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}
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do_flush_sync:
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@@ -391,15 +405,15 @@ do_flush_sync:
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* the streaming cache, no flush-flag synchronization needs
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* to be performed.
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*/
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- if (direction == PCI_DMA_TODEVICE)
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+ if (direction == DMA_TO_DEVICE)
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return;
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- PCI_STC_FLUSHFLAG_INIT(strbuf);
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- pci_iommu_write(strbuf->strbuf_fsync, strbuf->strbuf_flushflag_pa);
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- (void) pci_iommu_read(iommu->write_complete_reg);
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+ STC_FLUSHFLAG_INIT(strbuf);
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+ iommu_write(strbuf->strbuf_fsync, strbuf->strbuf_flushflag_pa);
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+ (void) iommu_read(iommu->write_complete_reg);
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limit = 100000;
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- while (!PCI_STC_FLUSHFLAG_SET(strbuf)) {
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+ while (!STC_FLUSHFLAG_SET(strbuf)) {
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limit--;
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if (!limit)
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break;
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@@ -407,37 +421,32 @@ do_flush_sync:
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rmb();
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}
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if (!limit)
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- printk(KERN_WARNING "pci_strbuf_flush: flushflag timeout "
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+ printk(KERN_WARNING "strbuf_flush: flushflag timeout "
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"vaddr[%08x] ctx[%lx] npages[%ld]\n",
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vaddr, ctx, npages);
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}
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-/* Unmap a single streaming mode DMA translation. */
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-static void pci_4u_unmap_single(struct pci_dev *pdev, dma_addr_t bus_addr, size_t sz, int direction)
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+static void dma_4u_unmap_single(struct device *dev, dma_addr_t bus_addr,
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+ size_t sz, enum dma_data_direction direction)
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{
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struct iommu *iommu;
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struct strbuf *strbuf;
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iopte_t *base;
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unsigned long flags, npages, ctx, i;
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- if (unlikely(direction == PCI_DMA_NONE)) {
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+ if (unlikely(direction == DMA_NONE)) {
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if (printk_ratelimit())
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WARN_ON(1);
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return;
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}
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- iommu = pdev->dev.archdata.iommu;
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- strbuf = pdev->dev.archdata.stc;
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+ iommu = dev->archdata.iommu;
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+ strbuf = dev->archdata.stc;
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npages = IO_PAGE_ALIGN(bus_addr + sz) - (bus_addr & IO_PAGE_MASK);
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npages >>= IO_PAGE_SHIFT;
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base = iommu->page_table +
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((bus_addr - iommu->page_table_map_base) >> IO_PAGE_SHIFT);
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-#ifdef DEBUG_PCI_IOMMU
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- if (IOPTE_IS_DUMMY(iommu, base))
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- printk("pci_unmap_single called on non-mapped region %08x,%08x from %016lx\n",
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- bus_addr, sz, __builtin_return_address(0));
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-#endif
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bus_addr &= IO_PAGE_MASK;
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spin_lock_irqsave(&iommu->lock, flags);
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@@ -449,8 +458,8 @@ static void pci_4u_unmap_single(struct pci_dev *pdev, dma_addr_t bus_addr, size_
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/* Step 1: Kick data out of streaming buffers if necessary. */
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if (strbuf->strbuf_enabled)
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- pci_strbuf_flush(strbuf, iommu, bus_addr, ctx,
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- npages, direction);
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+ strbuf_flush(strbuf, iommu, bus_addr, ctx,
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+ npages, direction);
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/* Step 2: Clear out TSB entries. */
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for (i = 0; i < npages; i++)
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@@ -467,7 +476,8 @@ static void pci_4u_unmap_single(struct pci_dev *pdev, dma_addr_t bus_addr, size_
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(__pa(page_address((SG)->page)) + (SG)->offset)
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static inline void fill_sg(iopte_t *iopte, struct scatterlist *sg,
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- int nused, int nelems, unsigned long iopte_protection)
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+ int nused, int nelems,
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+ unsigned long iopte_protection)
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{
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struct scatterlist *dma_sg = sg;
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struct scatterlist *sg_end = sg + nelems;
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@@ -539,12 +549,8 @@ static inline void fill_sg(iopte_t *iopte, struct scatterlist *sg,
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}
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}
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-/* Map a set of buffers described by SGLIST with NELEMS array
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- * elements in streaming mode for PCI DMA.
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- * When making changes here, inspect the assembly output. I was having
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- * hard time to keep this routine out of using stack slots for holding variables.
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- */
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-static int pci_4u_map_sg(struct pci_dev *pdev, struct scatterlist *sglist, int nelems, int direction)
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+static int dma_4u_map_sg(struct device *dev, struct scatterlist *sglist,
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+ int nelems, enum dma_data_direction direction)
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{
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struct iommu *iommu;
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struct strbuf *strbuf;
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@@ -557,19 +563,20 @@ static int pci_4u_map_sg(struct pci_dev *pdev, struct scatterlist *sglist, int n
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/* Fast path single entry scatterlists. */
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if (nelems == 1) {
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sglist->dma_address =
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- pci_4u_map_single(pdev,
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- (page_address(sglist->page) + sglist->offset),
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+ dma_4u_map_single(dev,
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+ (page_address(sglist->page) +
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+ sglist->offset),
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sglist->length, direction);
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- if (unlikely(sglist->dma_address == PCI_DMA_ERROR_CODE))
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+ if (unlikely(sglist->dma_address == DMA_ERROR_CODE))
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return 0;
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sglist->dma_length = sglist->length;
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return 1;
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}
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- iommu = pdev->dev.archdata.iommu;
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- strbuf = pdev->dev.archdata.stc;
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-
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- if (unlikely(direction == PCI_DMA_NONE))
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+ iommu = dev->archdata.iommu;
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+ strbuf = dev->archdata.stc;
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+
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+ if (unlikely(direction == DMA_NONE))
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goto bad_no_ctx;
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/* Step 1: Prepare scatter list. */
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@@ -609,7 +616,7 @@ static int pci_4u_map_sg(struct pci_dev *pdev, struct scatterlist *sglist, int n
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iopte_protection = IOPTE_STREAMING(ctx);
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else
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iopte_protection = IOPTE_CONSISTENT(ctx);
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- if (direction != PCI_DMA_TODEVICE)
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+ if (direction != DMA_TO_DEVICE)
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iopte_protection |= IOPTE_WRITE;
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fill_sg(base, sglist, used, nelems, iopte_protection);
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@@ -628,8 +635,8 @@ bad_no_ctx:
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return 0;
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}
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-/* Unmap a set of streaming mode DMA translations. */
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-static void pci_4u_unmap_sg(struct pci_dev *pdev, struct scatterlist *sglist, int nelems, int direction)
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+static void dma_4u_unmap_sg(struct device *dev, struct scatterlist *sglist,
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+ int nelems, enum dma_data_direction direction)
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{
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struct iommu *iommu;
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struct strbuf *strbuf;
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@@ -637,14 +644,14 @@ static void pci_4u_unmap_sg(struct pci_dev *pdev, struct scatterlist *sglist, in
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unsigned long flags, ctx, i, npages;
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u32 bus_addr;
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- if (unlikely(direction == PCI_DMA_NONE)) {
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+ if (unlikely(direction == DMA_NONE)) {
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if (printk_ratelimit())
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WARN_ON(1);
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}
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- iommu = pdev->dev.archdata.iommu;
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- strbuf = pdev->dev.archdata.stc;
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-
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+ iommu = dev->archdata.iommu;
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+ strbuf = dev->archdata.stc;
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+
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bus_addr = sglist->dma_address & IO_PAGE_MASK;
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for (i = 1; i < nelems; i++)
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@@ -657,11 +664,6 @@ static void pci_4u_unmap_sg(struct pci_dev *pdev, struct scatterlist *sglist, in
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base = iommu->page_table +
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((bus_addr - iommu->page_table_map_base) >> IO_PAGE_SHIFT);
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-#ifdef DEBUG_PCI_IOMMU
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- if (IOPTE_IS_DUMMY(iommu, base))
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- printk("pci_unmap_sg called on non-mapped region %016lx,%d from %016lx\n", sglist->dma_address, nelems, __builtin_return_address(0));
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-#endif
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-
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spin_lock_irqsave(&iommu->lock, flags);
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/* Record the context, if any. */
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@@ -671,7 +673,7 @@ static void pci_4u_unmap_sg(struct pci_dev *pdev, struct scatterlist *sglist, in
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/* Step 1: Kick data out of streaming buffers if necessary. */
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if (strbuf->strbuf_enabled)
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- pci_strbuf_flush(strbuf, iommu, bus_addr, ctx, npages, direction);
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+ strbuf_flush(strbuf, iommu, bus_addr, ctx, npages, direction);
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/* Step 2: Clear out the TSB entries. */
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for (i = 0; i < npages; i++)
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@@ -684,17 +686,16 @@ static void pci_4u_unmap_sg(struct pci_dev *pdev, struct scatterlist *sglist, in
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spin_unlock_irqrestore(&iommu->lock, flags);
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}
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-/* Make physical memory consistent for a single
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- * streaming mode DMA translation after a transfer.
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- */
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-static void pci_4u_dma_sync_single_for_cpu(struct pci_dev *pdev, dma_addr_t bus_addr, size_t sz, int direction)
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+static void dma_4u_sync_single_for_cpu(struct device *dev,
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+ dma_addr_t bus_addr, size_t sz,
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+ enum dma_data_direction direction)
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{
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struct iommu *iommu;
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struct strbuf *strbuf;
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unsigned long flags, ctx, npages;
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- iommu = pdev->dev.archdata.iommu;
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- strbuf = pdev->dev.archdata.stc;
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+ iommu = dev->archdata.iommu;
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+ strbuf = dev->archdata.stc;
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if (!strbuf->strbuf_enabled)
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return;
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@@ -717,23 +718,22 @@ static void pci_4u_dma_sync_single_for_cpu(struct pci_dev *pdev, dma_addr_t bus_
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}
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/* Step 2: Kick data out of streaming buffers. */
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- pci_strbuf_flush(strbuf, iommu, bus_addr, ctx, npages, direction);
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+ strbuf_flush(strbuf, iommu, bus_addr, ctx, npages, direction);
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spin_unlock_irqrestore(&iommu->lock, flags);
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}
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-/* Make physical memory consistent for a set of streaming
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- * mode DMA translations after a transfer.
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- */
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-static void pci_4u_dma_sync_sg_for_cpu(struct pci_dev *pdev, struct scatterlist *sglist, int nelems, int direction)
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+static void dma_4u_sync_sg_for_cpu(struct device *dev,
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+ struct scatterlist *sglist, int nelems,
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+ enum dma_data_direction direction)
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{
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struct iommu *iommu;
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struct strbuf *strbuf;
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unsigned long flags, ctx, npages, i;
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u32 bus_addr;
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- iommu = pdev->dev.archdata.iommu;
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- strbuf = pdev->dev.archdata.stc;
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+ iommu = dev->archdata.iommu;
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+ strbuf = dev->archdata.stc;
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if (!strbuf->strbuf_enabled)
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return;
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@@ -759,65 +759,51 @@ static void pci_4u_dma_sync_sg_for_cpu(struct pci_dev *pdev, struct scatterlist
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i--;
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npages = (IO_PAGE_ALIGN(sglist[i].dma_address + sglist[i].dma_length)
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- bus_addr) >> IO_PAGE_SHIFT;
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- pci_strbuf_flush(strbuf, iommu, bus_addr, ctx, npages, direction);
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+ strbuf_flush(strbuf, iommu, bus_addr, ctx, npages, direction);
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spin_unlock_irqrestore(&iommu->lock, flags);
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}
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-const struct pci_iommu_ops pci_sun4u_iommu_ops = {
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- .alloc_consistent = pci_4u_alloc_consistent,
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- .free_consistent = pci_4u_free_consistent,
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- .map_single = pci_4u_map_single,
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- .unmap_single = pci_4u_unmap_single,
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- .map_sg = pci_4u_map_sg,
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- .unmap_sg = pci_4u_unmap_sg,
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- .dma_sync_single_for_cpu = pci_4u_dma_sync_single_for_cpu,
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- .dma_sync_sg_for_cpu = pci_4u_dma_sync_sg_for_cpu,
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+const struct dma_ops sun4u_dma_ops = {
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+ .alloc_coherent = dma_4u_alloc_coherent,
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+ .free_coherent = dma_4u_free_coherent,
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+ .map_single = dma_4u_map_single,
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+ .unmap_single = dma_4u_unmap_single,
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+ .map_sg = dma_4u_map_sg,
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+ .unmap_sg = dma_4u_unmap_sg,
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+ .sync_single_for_cpu = dma_4u_sync_single_for_cpu,
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+ .sync_sg_for_cpu = dma_4u_sync_sg_for_cpu,
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};
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-static void ali_sound_dma_hack(struct pci_dev *pdev, int set_bit)
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-{
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- struct pci_dev *ali_isa_bridge;
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- u8 val;
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+const struct dma_ops *dma_ops = &sun4u_dma_ops;
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+EXPORT_SYMBOL(dma_ops);
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- /* ALI sound chips generate 31-bits of DMA, a special register
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- * determines what bit 31 is emitted as.
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- */
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- ali_isa_bridge = pci_get_device(PCI_VENDOR_ID_AL,
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- PCI_DEVICE_ID_AL_M1533,
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- NULL);
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-
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- pci_read_config_byte(ali_isa_bridge, 0x7e, &val);
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- if (set_bit)
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- val |= 0x01;
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- else
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- val &= ~0x01;
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- pci_write_config_byte(ali_isa_bridge, 0x7e, val);
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- pci_dev_put(ali_isa_bridge);
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-}
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-
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-int pci_dma_supported(struct pci_dev *pdev, u64 device_mask)
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+int dma_supported(struct device *dev, u64 device_mask)
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{
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- u64 dma_addr_mask;
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+ struct iommu *iommu = dev->archdata.iommu;
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+ u64 dma_addr_mask = iommu->dma_addr_mask;
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- if (pdev == NULL) {
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- dma_addr_mask = 0xffffffff;
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- } else {
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- struct iommu *iommu = pdev->dev.archdata.iommu;
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+ if (device_mask >= (1UL << 32UL))
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+ return 0;
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- dma_addr_mask = iommu->dma_addr_mask;
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+ if ((device_mask & dma_addr_mask) == dma_addr_mask)
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+ return 1;
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- if (pdev->vendor == PCI_VENDOR_ID_AL &&
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- pdev->device == PCI_DEVICE_ID_AL_M5451 &&
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- device_mask == 0x7fffffff) {
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- ali_sound_dma_hack(pdev,
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- (dma_addr_mask & 0x80000000) != 0);
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- return 1;
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- }
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- }
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+#ifdef CONFIG_PCI
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+ if (dev->bus == &pci_bus_type)
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+ return pci_dma_supported(to_pci_dev(dev), device_mask);
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+#endif
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- if (device_mask >= (1UL << 32UL))
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- return 0;
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+ return 0;
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+}
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+EXPORT_SYMBOL(dma_supported);
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- return (device_mask & dma_addr_mask) == dma_addr_mask;
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+int dma_set_mask(struct device *dev, u64 dma_mask)
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+{
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+#ifdef CONFIG_PCI
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+ if (dev->bus == &pci_bus_type)
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+ return pci_set_dma_mask(to_pci_dev(dev), dma_mask);
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+#endif
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+ return -EINVAL;
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}
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+EXPORT_SYMBOL(dma_set_mask);
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