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sh: sh7785lcr: fix PCI address map for 32-bit mode

Fix the problem that cannot work PCI device on 32-bit mode because
influence of the commit 68b42d1b548be1840aff7122fdebeb804daf0fa3
("sh: sh7785lcr: Map whole PCI address space."). So this patch was
implement like a 29-bit mode, map whole physical address space of
DDR-SDRAM.

Signed-off-by: Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Yoshihiro Shimoda 16 年 前
コミット
9bb019f4c2
2 ファイル変更7 行追加0 行削除
  1. 5 0
      arch/sh/drivers/pci/ops-sh7785lcr.c
  2. 2 0
      arch/sh/drivers/pci/pci-sh7780.h

+ 5 - 0
arch/sh/drivers/pci/ops-sh7785lcr.c

@@ -48,8 +48,13 @@ EXPORT_SYMBOL(board_pci_channels);
 
 static struct sh4_pci_address_map sh7785_pci_map = {
 	.window0	= {
+#if defined(CONFIG_32BIT)
+		.base	= SH7780_32BIT_DDR_BASE_ADDR,
+		.size	= 0x40000000,
+#else
 		.base	= SH7780_CS0_BASE_ADDR,
 		.size	= 0x20000000,
+#endif
 	},
 
 	.flags	= SH4_PCIC_NO_RESET,

+ 2 - 0
arch/sh/drivers/pci/pci-sh7780.h

@@ -104,6 +104,8 @@
 #define SH7780_CS5_BASE_ADDR	(SH7780_CS4_BASE_ADDR + SH7780_MEM_REGION_SIZE)
 #define SH7780_CS6_BASE_ADDR	(SH7780_CS5_BASE_ADDR + SH7780_MEM_REGION_SIZE)
 
+#define SH7780_32BIT_DDR_BASE_ADDR	0x40000000
+
 struct sh4_pci_address_map;
 
 /* arch/sh/drivers/pci/pci-sh7780.c */