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@@ -48,7 +48,7 @@ EXPORT_SYMBOL_GPL(mv_mbus_dram_info);
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static void __init __iomem *
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orion_win_cfg_base(const struct orion_addr_map_cfg *cfg, int win)
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{
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- return (void __iomem *)(cfg->bridge_virt_base + (win << 4));
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+ return cfg->bridge_virt_base + (win << 4);
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}
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/*
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@@ -143,19 +143,16 @@ void __init orion_config_wins(struct orion_addr_map_cfg * cfg,
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* Setup MBUS dram target info.
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*/
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void __init orion_setup_cpu_mbus_target(const struct orion_addr_map_cfg *cfg,
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- const u32 ddr_window_cpu_base)
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+ const void __iomem *ddr_window_cpu_base)
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{
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- void __iomem *addr;
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int i;
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int cs;
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orion_mbus_dram_info.mbus_dram_target_id = TARGET_DDR;
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- addr = (void __iomem *)ddr_window_cpu_base;
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-
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for (i = 0, cs = 0; i < 4; i++) {
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- u32 base = readl(addr + DDR_BASE_CS_OFF(i));
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- u32 size = readl(addr + DDR_SIZE_CS_OFF(i));
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+ u32 base = readl(ddr_window_cpu_base + DDR_BASE_CS_OFF(i));
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+ u32 size = readl(ddr_window_cpu_base + DDR_SIZE_CS_OFF(i));
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/*
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* Chip select enabled?
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