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@@ -2466,6 +2466,7 @@ static int kv_parse_power_table(struct radeon_device *rdev)
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rdev->pm.dpm.backbias_response_time = le16_to_cpu(power_info->pplib.usBackbiasTime);
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rdev->pm.dpm.voltage_response_time = le16_to_cpu(power_info->pplib.usVoltageTime);
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for (i = 0; i < state_array->ucNumEntries; i++) {
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+ u8 *idx;
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power_state = (union pplib_power_state *)power_state_offset;
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non_clock_array_index = power_state->v2.nonClockInfoIndex;
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non_clock_info = (struct _ATOM_PPLIB_NONCLOCK_INFO *)
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@@ -2479,14 +2480,16 @@ static int kv_parse_power_table(struct radeon_device *rdev)
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}
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rdev->pm.dpm.ps[i].ps_priv = ps;
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k = 0;
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+ idx = (u8 *)&power_state->v2.clockInfoIndex[0];
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for (j = 0; j < power_state->v2.ucNumDPMLevels; j++) {
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- clock_array_index = power_state->v2.clockInfoIndex[j];
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+ clock_array_index = idx[j];
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if (clock_array_index >= clock_info_array->ucNumEntries)
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continue;
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if (k >= SUMO_MAX_HARDWARE_POWERLEVELS)
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break;
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clock_info = (union pplib_clock_info *)
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- &clock_info_array->clockInfo[clock_array_index * clock_info_array->ucEntrySize];
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+ ((u8 *)&clock_info_array->clockInfo[0] +
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+ (clock_array_index * clock_info_array->ucEntrySize));
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kv_parse_pplib_clock_info(rdev,
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&rdev->pm.dpm.ps[i], k,
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clock_info);
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