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@@ -28,6 +28,7 @@
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#include <asm/cputable.h>
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#include <asm/time.h>
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#include <asm/smu.h>
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+#include <asm/pmac_pfunc.h>
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#undef DEBUG
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@@ -85,6 +86,10 @@ static u32 *g5_pmode_data;
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static int g5_pmode_max;
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static int g5_pmode_cur;
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+static void (*g5_switch_volt)(int speed_mode);
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+static int (*g5_switch_freq)(int speed_mode);
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+static int (*g5_query_freq)(void);
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+
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static DECLARE_MUTEX(g5_switch_mutex);
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@@ -92,9 +97,11 @@ static struct smu_sdbp_fvt *g5_fvt_table; /* table of op. points */
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static int g5_fvt_count; /* number of op. points */
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static int g5_fvt_cur; /* current op. point */
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-/* ----------------- real hardware interface */
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+/*
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+ * SMU based voltage switching for Neo2 platforms
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+ */
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-static void g5_switch_volt(int speed_mode)
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+static void g5_smu_switch_volt(int speed_mode)
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{
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struct smu_simple_cmd cmd;
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@@ -105,26 +112,57 @@ static void g5_switch_volt(int speed_mode)
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wait_for_completion(&comp);
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}
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-static int g5_switch_freq(int speed_mode)
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+/*
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+ * Platform function based voltage/vdnap switching for Neo2
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+ */
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+
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+static struct pmf_function *pfunc_set_vdnap0;
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+static struct pmf_function *pfunc_vdnap0_complete;
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+
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+static void g5_vdnap_switch_volt(int speed_mode)
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{
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- struct cpufreq_freqs freqs;
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- int to;
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+ struct pmf_args args;
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+ u32 slew, done = 0;
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+ unsigned long timeout;
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- if (g5_pmode_cur == speed_mode)
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- return 0;
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+ slew = (speed_mode == CPUFREQ_LOW) ? 1 : 0;
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+ args.count = 1;
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+ args.u[0].p = &slew;
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- down(&g5_switch_mutex);
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+ pmf_call_one(pfunc_set_vdnap0, &args);
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- freqs.old = g5_cpu_freqs[g5_pmode_cur].frequency;
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- freqs.new = g5_cpu_freqs[speed_mode].frequency;
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- freqs.cpu = 0;
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+ /* It's an irq GPIO so we should be able to just block here,
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+ * I'll do that later after I've properly tested the IRQ code for
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+ * platform functions
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+ */
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+ timeout = jiffies + HZ/10;
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+ while(!time_after(jiffies, timeout)) {
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+ args.count = 1;
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+ args.u[0].p = &done;
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+ pmf_call_one(pfunc_vdnap0_complete, &args);
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+ if (done)
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+ break;
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+ msleep(1);
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+ }
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+ if (done == 0)
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+ printk(KERN_WARNING "cpufreq: Timeout in clock slewing !\n");
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+}
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- cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE);
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+
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+/*
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+ * SCOM based frequency switching for 970FX rev3
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+ */
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+static int g5_scom_switch_freq(int speed_mode)
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+{
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+ unsigned long flags;
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+ int to;
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/* If frequency is going up, first ramp up the voltage */
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if (speed_mode < g5_pmode_cur)
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g5_switch_volt(speed_mode);
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+ local_irq_save(flags);
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+
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/* Clear PCR high */
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scom970_write(SCOM_PCR, 0);
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/* Clear PCR low */
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@@ -147,6 +185,8 @@ static int g5_switch_freq(int speed_mode)
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udelay(100);
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}
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+ local_irq_restore(flags);
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+
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/* If frequency is going down, last ramp the voltage */
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if (speed_mode > g5_pmode_cur)
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g5_switch_volt(speed_mode);
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@@ -154,14 +194,10 @@ static int g5_switch_freq(int speed_mode)
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g5_pmode_cur = speed_mode;
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ppc_proc_freq = g5_cpu_freqs[speed_mode].frequency * 1000ul;
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- cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE);
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-
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- up(&g5_switch_mutex);
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-
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return 0;
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}
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-static int g5_query_freq(void)
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+static int g5_scom_query_freq(void)
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{
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unsigned long psr = scom970_read(SCOM_PSR);
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int i;
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@@ -173,7 +209,104 @@ static int g5_query_freq(void)
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return i;
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}
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-/* ----------------- cpufreq bookkeeping */
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+/*
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+ * Platform function based voltage switching for PowerMac7,2 & 7,3
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+ */
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+
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+static struct pmf_function *pfunc_cpu0_volt_high;
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+static struct pmf_function *pfunc_cpu0_volt_low;
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+static struct pmf_function *pfunc_cpu1_volt_high;
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+static struct pmf_function *pfunc_cpu1_volt_low;
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+
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+static void g5_pfunc_switch_volt(int speed_mode)
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+{
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+ if (speed_mode == CPUFREQ_HIGH) {
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+ if (pfunc_cpu0_volt_high)
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+ pmf_call_one(pfunc_cpu0_volt_high, NULL);
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+ if (pfunc_cpu1_volt_high)
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+ pmf_call_one(pfunc_cpu1_volt_high, NULL);
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+ } else {
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+ if (pfunc_cpu0_volt_low)
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+ pmf_call_one(pfunc_cpu0_volt_low, NULL);
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+ if (pfunc_cpu1_volt_low)
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+ pmf_call_one(pfunc_cpu1_volt_low, NULL);
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+ }
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+ msleep(10); /* should be faster , to fix */
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+}
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+
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+/*
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+ * Platform function based frequency switching for PowerMac7,2 & 7,3
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+ */
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+
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+static struct pmf_function *pfunc_cpu_setfreq_high;
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+static struct pmf_function *pfunc_cpu_setfreq_low;
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+static struct pmf_function *pfunc_cpu_getfreq;
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+static struct pmf_function *pfunc_slewing_done;;
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+
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+static int g5_pfunc_switch_freq(int speed_mode)
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+{
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+ struct pmf_args args;
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+ u32 done = 0;
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+ unsigned long timeout;
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+
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+ /* If frequency is going up, first ramp up the voltage */
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+ if (speed_mode < g5_pmode_cur)
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+ g5_switch_volt(speed_mode);
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+
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+ /* Do it */
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+ if (speed_mode == CPUFREQ_HIGH)
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+ pmf_call_one(pfunc_cpu_setfreq_high, NULL);
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+ else
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+ pmf_call_one(pfunc_cpu_setfreq_low, NULL);
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+
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+ /* It's an irq GPIO so we should be able to just block here,
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+ * I'll do that later after I've properly tested the IRQ code for
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+ * platform functions
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+ */
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+ timeout = jiffies + HZ/10;
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+ while(!time_after(jiffies, timeout)) {
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+ args.count = 1;
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+ args.u[0].p = &done;
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+ pmf_call_one(pfunc_slewing_done, &args);
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+ if (done)
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+ break;
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+ msleep(1);
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+ }
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+ if (done == 0)
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+ printk(KERN_WARNING "cpufreq: Timeout in clock slewing !\n");
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+
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+ /* If frequency is going down, last ramp the voltage */
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+ if (speed_mode > g5_pmode_cur)
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+ g5_switch_volt(speed_mode);
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+
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+ g5_pmode_cur = speed_mode;
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+ ppc_proc_freq = g5_cpu_freqs[speed_mode].frequency * 1000ul;
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+
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+ return 0;
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+}
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+
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+static int g5_pfunc_query_freq(void)
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+{
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+ struct pmf_args args;
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+ u32 val = 0;
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+
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+ args.count = 1;
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+ args.u[0].p = &val;
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+ pmf_call_one(pfunc_cpu_getfreq, &args);
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+ return val ? CPUFREQ_HIGH : CPUFREQ_LOW;
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+}
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+
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+/*
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+ * Fake voltage switching for platforms with missing support
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+ */
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+
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+static void g5_dummy_switch_volt(int speed_mode)
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+{
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+}
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+
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+/*
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+ * Common interface to the cpufreq core
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+ */
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static int g5_cpufreq_verify(struct cpufreq_policy *policy)
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{
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@@ -183,13 +316,30 @@ static int g5_cpufreq_verify(struct cpufreq_policy *policy)
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static int g5_cpufreq_target(struct cpufreq_policy *policy,
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unsigned int target_freq, unsigned int relation)
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{
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- unsigned int newstate = 0;
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+ unsigned int newstate = 0;
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+ struct cpufreq_freqs freqs;
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+ int rc;
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if (cpufreq_frequency_table_target(policy, g5_cpu_freqs,
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target_freq, relation, &newstate))
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return -EINVAL;
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- return g5_switch_freq(newstate);
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+ if (g5_pmode_cur == newstate)
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+ return 0;
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+
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+ down(&g5_switch_mutex);
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+
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+ freqs.old = g5_cpu_freqs[g5_pmode_cur].frequency;
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+ freqs.new = g5_cpu_freqs[newstate].frequency;
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+ freqs.cpu = 0;
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+
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+ cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE);
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+ rc = g5_switch_freq(newstate);
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+ cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE);
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+
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+ up(&g5_switch_mutex);
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+
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+ return rc;
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}
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static unsigned int g5_cpufreq_get_speed(unsigned int cpu)
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@@ -205,6 +355,7 @@ static int g5_cpufreq_cpu_init(struct cpufreq_policy *policy)
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policy->governor = CPUFREQ_DEFAULT_GOVERNOR;
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policy->cpuinfo.transition_latency = CPUFREQ_ETERNAL;
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policy->cur = g5_cpu_freqs[g5_query_freq()].frequency;
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+ policy->cpus = cpu_possible_map;
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cpufreq_frequency_table_get_attr(g5_cpu_freqs, policy->cpu);
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return cpufreq_frequency_table_cpuinfo(policy,
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@@ -224,19 +375,39 @@ static struct cpufreq_driver g5_cpufreq_driver = {
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};
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-static int __init g5_cpufreq_init(void)
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+static int __init g5_neo2_cpufreq_init(struct device_node *cpus)
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{
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struct device_node *cpunode;
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unsigned int psize, ssize;
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- struct smu_sdbp_header *shdr;
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unsigned long max_freq;
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- u32 *valp;
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+ char *freq_method, *volt_method;
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+ u32 *valp, pvr_hi;
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+ int use_volts_vdnap = 0;
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+ int use_volts_smu = 0;
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int rc = -ENODEV;
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- /* Look for CPU and SMU nodes */
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- cpunode = of_find_node_by_type(NULL, "cpu");
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- if (!cpunode) {
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- DBG("No CPU node !\n");
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+ /* Check supported platforms */
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+ if (machine_is_compatible("PowerMac8,1") ||
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+ machine_is_compatible("PowerMac8,2") ||
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+ machine_is_compatible("PowerMac9,1"))
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+ use_volts_smu = 1;
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+ else if (machine_is_compatible("PowerMac11,2"))
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+ use_volts_vdnap = 1;
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+ else
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+ return -ENODEV;
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+
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+ /* Get first CPU node */
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+ for (cpunode = NULL;
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+ (cpunode = of_get_next_child(cpus, cpunode)) != NULL;) {
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+ u32 *reg =
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+ (u32 *)get_property(cpunode, "reg", NULL);
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+ if (reg == NULL || (*reg) != 0)
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+ continue;
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+ if (!strcmp(cpunode->type, "cpu"))
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+ break;
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+ }
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+ if (cpunode == NULL) {
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+ printk(KERN_ERR "cpufreq: Can't find any CPU 0 node\n");
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return -ENODEV;
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}
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@@ -246,8 +417,9 @@ static int __init g5_cpufreq_init(void)
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DBG("No cpu-version property !\n");
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goto bail_noprops;
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}
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- if (((*valp) >> 16) != 0x3c) {
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- DBG("Wrong CPU version: %08x\n", *valp);
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+ pvr_hi = (*valp) >> 16;
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+ if (pvr_hi != 0x3c && pvr_hi != 0x44) {
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+ printk(KERN_ERR "cpufreq: Unsupported CPU version\n");
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goto bail_noprops;
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}
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@@ -259,18 +431,50 @@ static int __init g5_cpufreq_init(void)
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}
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g5_pmode_max = psize / sizeof(u32) - 1;
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- /* Look for the FVT table */
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- shdr = smu_get_sdb_partition(SMU_SDB_FVT_ID, NULL);
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- if (!shdr)
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- goto bail_noprops;
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- g5_fvt_table = (struct smu_sdbp_fvt *)&shdr[1];
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- ssize = (shdr->len * sizeof(u32)) - sizeof(struct smu_sdbp_header);
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- g5_fvt_count = ssize / sizeof(struct smu_sdbp_fvt);
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- g5_fvt_cur = 0;
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-
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- /* Sanity checking */
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- if (g5_fvt_count < 1 || g5_pmode_max < 1)
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- goto bail_noprops;
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+ if (use_volts_smu) {
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+ struct smu_sdbp_header *shdr;
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+
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+ /* Look for the FVT table */
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+ shdr = smu_get_sdb_partition(SMU_SDB_FVT_ID, NULL);
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+ if (!shdr)
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+ goto bail_noprops;
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+ g5_fvt_table = (struct smu_sdbp_fvt *)&shdr[1];
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+ ssize = (shdr->len * sizeof(u32)) -
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+ sizeof(struct smu_sdbp_header);
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+ g5_fvt_count = ssize / sizeof(struct smu_sdbp_fvt);
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+ g5_fvt_cur = 0;
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+
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+ /* Sanity checking */
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+ if (g5_fvt_count < 1 || g5_pmode_max < 1)
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+ goto bail_noprops;
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+
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+ g5_switch_volt = g5_smu_switch_volt;
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+ volt_method = "SMU";
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+ } else if (use_volts_vdnap) {
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+ struct device_node *root;
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+
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+ root = of_find_node_by_path("/");
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+ if (root == NULL) {
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+ printk(KERN_ERR "cpufreq: Can't find root of "
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+ "device tree\n");
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+ goto bail_noprops;
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+ }
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+ pfunc_set_vdnap0 = pmf_find_function(root, "set-vdnap0");
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+ pfunc_vdnap0_complete =
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+ pmf_find_function(root, "slewing-done");
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+ if (pfunc_set_vdnap0 == NULL ||
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+ pfunc_vdnap0_complete == NULL) {
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+ printk(KERN_ERR "cpufreq: Can't find required "
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+ "platform function\n");
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+ goto bail_noprops;
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+ }
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+
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+ g5_switch_volt = g5_vdnap_switch_volt;
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+ volt_method = "GPIO";
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+ } else {
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+ g5_switch_volt = g5_dummy_switch_volt;
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+ volt_method = "none";
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+ }
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/*
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* From what I see, clock-frequency is always the maximal frequency.
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@@ -286,19 +490,23 @@ static int __init g5_cpufreq_init(void)
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g5_cpu_freqs[0].frequency = max_freq;
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g5_cpu_freqs[1].frequency = max_freq/2;
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- /* Check current frequency */
|
|
|
- g5_pmode_cur = g5_query_freq();
|
|
|
- if (g5_pmode_cur > 1)
|
|
|
- /* We don't support anything but 1:1 and 1:2, fixup ... */
|
|
|
- g5_pmode_cur = 1;
|
|
|
+ /* Set callbacks */
|
|
|
+ g5_switch_freq = g5_scom_switch_freq;
|
|
|
+ g5_query_freq = g5_scom_query_freq;
|
|
|
+ freq_method = "SCOM";
|
|
|
|
|
|
/* Force apply current frequency to make sure everything is in
|
|
|
* sync (voltage is right for example). Firmware may leave us with
|
|
|
* a strange setting ...
|
|
|
*/
|
|
|
- g5_switch_freq(g5_pmode_cur);
|
|
|
+ g5_switch_volt(CPUFREQ_HIGH);
|
|
|
+ msleep(10);
|
|
|
+ g5_pmode_cur = -1;
|
|
|
+ g5_switch_freq(g5_query_freq());
|
|
|
|
|
|
printk(KERN_INFO "Registering G5 CPU frequency driver\n");
|
|
|
+ printk(KERN_INFO "Frequency method: %s, Voltage method: %s\n",
|
|
|
+ freq_method, volt_method);
|
|
|
printk(KERN_INFO "Low: %d Mhz, High: %d Mhz, Cur: %d MHz\n",
|
|
|
g5_cpu_freqs[1].frequency/1000,
|
|
|
g5_cpu_freqs[0].frequency/1000,
|
|
@@ -317,6 +525,200 @@ static int __init g5_cpufreq_init(void)
|
|
|
return rc;
|
|
|
}
|
|
|
|
|
|
+static int __init g5_pm72_cpufreq_init(struct device_node *cpus)
|
|
|
+{
|
|
|
+ struct device_node *cpuid = NULL, *hwclock = NULL, *cpunode = NULL;
|
|
|
+ u8 *eeprom = NULL;
|
|
|
+ u32 *valp;
|
|
|
+ u64 max_freq, min_freq, ih, il;
|
|
|
+ int has_volt = 1, rc = 0;
|
|
|
+
|
|
|
+ /* Get first CPU node */
|
|
|
+ for (cpunode = NULL;
|
|
|
+ (cpunode = of_get_next_child(cpus, cpunode)) != NULL;) {
|
|
|
+ if (!strcmp(cpunode->type, "cpu"))
|
|
|
+ break;
|
|
|
+ }
|
|
|
+ if (cpunode == NULL) {
|
|
|
+ printk(KERN_ERR "cpufreq: Can't find any CPU node\n");
|
|
|
+ return -ENODEV;
|
|
|
+ }
|
|
|
+
|
|
|
+ /* Lookup the cpuid eeprom node */
|
|
|
+ cpuid = of_find_node_by_path("/u3@0,f8000000/i2c@f8001000/cpuid@a0");
|
|
|
+ if (cpuid != NULL)
|
|
|
+ eeprom = (u8 *)get_property(cpuid, "cpuid", NULL);
|
|
|
+ if (eeprom == NULL) {
|
|
|
+ printk(KERN_ERR "cpufreq: Can't find cpuid EEPROM !\n");
|
|
|
+ rc = -ENODEV;
|
|
|
+ goto bail;
|
|
|
+ }
|
|
|
+
|
|
|
+ /* Lookup the i2c hwclock */
|
|
|
+ for (hwclock = NULL;
|
|
|
+ (hwclock = of_find_node_by_name(hwclock, "i2c-hwclock")) != NULL;){
|
|
|
+ char *loc = get_property(hwclock, "hwctrl-location", NULL);
|
|
|
+ if (loc == NULL)
|
|
|
+ continue;
|
|
|
+ if (strcmp(loc, "CPU CLOCK"))
|
|
|
+ continue;
|
|
|
+ if (!get_property(hwclock, "platform-get-frequency", NULL))
|
|
|
+ continue;
|
|
|
+ break;
|
|
|
+ }
|
|
|
+ if (hwclock == NULL) {
|
|
|
+ printk(KERN_ERR "cpufreq: Can't find i2c clock chip !\n");
|
|
|
+ rc = -ENODEV;
|
|
|
+ goto bail;
|
|
|
+ }
|
|
|
+
|
|
|
+ DBG("cpufreq: i2c clock chip found: %s\n", hwclock->full_name);
|
|
|
+
|
|
|
+ /* Now get all the platform functions */
|
|
|
+ pfunc_cpu_getfreq =
|
|
|
+ pmf_find_function(hwclock, "get-frequency");
|
|
|
+ pfunc_cpu_setfreq_high =
|
|
|
+ pmf_find_function(hwclock, "set-frequency-high");
|
|
|
+ pfunc_cpu_setfreq_low =
|
|
|
+ pmf_find_function(hwclock, "set-frequency-low");
|
|
|
+ pfunc_slewing_done =
|
|
|
+ pmf_find_function(hwclock, "slewing-done");
|
|
|
+ pfunc_cpu0_volt_high =
|
|
|
+ pmf_find_function(hwclock, "set-voltage-high-0");
|
|
|
+ pfunc_cpu0_volt_low =
|
|
|
+ pmf_find_function(hwclock, "set-voltage-low-0");
|
|
|
+ pfunc_cpu1_volt_high =
|
|
|
+ pmf_find_function(hwclock, "set-voltage-high-1");
|
|
|
+ pfunc_cpu1_volt_low =
|
|
|
+ pmf_find_function(hwclock, "set-voltage-low-1");
|
|
|
+
|
|
|
+ /* Check we have minimum requirements */
|
|
|
+ if (pfunc_cpu_getfreq == NULL || pfunc_cpu_setfreq_high == NULL ||
|
|
|
+ pfunc_cpu_setfreq_low == NULL || pfunc_slewing_done == NULL) {
|
|
|
+ printk(KERN_ERR "cpufreq: Can't find platform functions !\n");
|
|
|
+ rc = -ENODEV;
|
|
|
+ goto bail;
|
|
|
+ }
|
|
|
+
|
|
|
+ /* Check that we have complete sets */
|
|
|
+ if (pfunc_cpu0_volt_high == NULL || pfunc_cpu0_volt_low == NULL) {
|
|
|
+ pmf_put_function(pfunc_cpu0_volt_high);
|
|
|
+ pmf_put_function(pfunc_cpu0_volt_low);
|
|
|
+ pfunc_cpu0_volt_high = pfunc_cpu0_volt_low = NULL;
|
|
|
+ has_volt = 0;
|
|
|
+ }
|
|
|
+ if (!has_volt ||
|
|
|
+ pfunc_cpu1_volt_high == NULL || pfunc_cpu1_volt_low == NULL) {
|
|
|
+ pmf_put_function(pfunc_cpu1_volt_high);
|
|
|
+ pmf_put_function(pfunc_cpu1_volt_low);
|
|
|
+ pfunc_cpu1_volt_high = pfunc_cpu1_volt_low = NULL;
|
|
|
+ }
|
|
|
+
|
|
|
+ /* Note: The device tree also contains a "platform-set-values"
|
|
|
+ * function for which I haven't quite figured out the usage. It
|
|
|
+ * might have to be called on init and/or wakeup, I'm not too sure
|
|
|
+ * but things seem to work fine without it so far ...
|
|
|
+ */
|
|
|
+
|
|
|
+ /* Get max frequency from device-tree */
|
|
|
+ valp = (u32 *)get_property(cpunode, "clock-frequency", NULL);
|
|
|
+ if (!valp) {
|
|
|
+ printk(KERN_ERR "cpufreq: Can't find CPU frequency !\n");
|
|
|
+ rc = -ENODEV;
|
|
|
+ goto bail;
|
|
|
+ }
|
|
|
+
|
|
|
+ max_freq = (*valp)/1000;
|
|
|
+
|
|
|
+ /* Now calculate reduced frequency by using the cpuid input freq
|
|
|
+ * ratio. This requires 64 bits math unless we are willing to lose
|
|
|
+ * some precision
|
|
|
+ */
|
|
|
+ ih = *((u32 *)(eeprom + 0x10));
|
|
|
+ il = *((u32 *)(eeprom + 0x20));
|
|
|
+ min_freq = 0;
|
|
|
+ if (ih != 0 && il != 0)
|
|
|
+ min_freq = (max_freq * il) / ih;
|
|
|
+
|
|
|
+ /* Sanity check */
|
|
|
+ if (min_freq >= max_freq || min_freq < 1000) {
|
|
|
+ printk(KERN_ERR "cpufreq: Can't calculate low frequency !\n");
|
|
|
+ rc = -ENODEV;
|
|
|
+ goto bail;
|
|
|
+ }
|
|
|
+ g5_cpu_freqs[0].frequency = max_freq;
|
|
|
+ g5_cpu_freqs[1].frequency = min_freq;
|
|
|
+
|
|
|
+ /* Set callbacks */
|
|
|
+ g5_switch_volt = g5_pfunc_switch_volt;
|
|
|
+ g5_switch_freq = g5_pfunc_switch_freq;
|
|
|
+ g5_query_freq = g5_pfunc_query_freq;
|
|
|
+
|
|
|
+ /* Force apply current frequency to make sure everything is in
|
|
|
+ * sync (voltage is right for example). Firmware may leave us with
|
|
|
+ * a strange setting ...
|
|
|
+ */
|
|
|
+ g5_switch_volt(CPUFREQ_HIGH);
|
|
|
+ msleep(10);
|
|
|
+ g5_pmode_cur = -1;
|
|
|
+ g5_switch_freq(g5_query_freq());
|
|
|
+
|
|
|
+ printk(KERN_INFO "Registering G5 CPU frequency driver\n");
|
|
|
+ printk(KERN_INFO "Frequency method: i2c/pfunc, "
|
|
|
+ "Voltage method: %s\n", has_volt ? "i2c/pfunc" : "none");
|
|
|
+ printk(KERN_INFO "Low: %d Mhz, High: %d Mhz, Cur: %d MHz\n",
|
|
|
+ g5_cpu_freqs[1].frequency/1000,
|
|
|
+ g5_cpu_freqs[0].frequency/1000,
|
|
|
+ g5_cpu_freqs[g5_pmode_cur].frequency/1000);
|
|
|
+
|
|
|
+ rc = cpufreq_register_driver(&g5_cpufreq_driver);
|
|
|
+ bail:
|
|
|
+ if (rc != 0) {
|
|
|
+ pmf_put_function(pfunc_cpu_getfreq);
|
|
|
+ pmf_put_function(pfunc_cpu_setfreq_high);
|
|
|
+ pmf_put_function(pfunc_cpu_setfreq_low);
|
|
|
+ pmf_put_function(pfunc_slewing_done);
|
|
|
+ pmf_put_function(pfunc_cpu0_volt_high);
|
|
|
+ pmf_put_function(pfunc_cpu0_volt_low);
|
|
|
+ pmf_put_function(pfunc_cpu1_volt_high);
|
|
|
+ pmf_put_function(pfunc_cpu1_volt_low);
|
|
|
+ }
|
|
|
+ of_node_put(hwclock);
|
|
|
+ of_node_put(cpuid);
|
|
|
+ of_node_put(cpunode);
|
|
|
+
|
|
|
+ return rc;
|
|
|
+}
|
|
|
+
|
|
|
+static int __init g5_rm31_cpufreq_init(struct device_node *cpus)
|
|
|
+{
|
|
|
+ /* NYI */
|
|
|
+ return 0;
|
|
|
+}
|
|
|
+
|
|
|
+static int __init g5_cpufreq_init(void)
|
|
|
+{
|
|
|
+ struct device_node *cpus;
|
|
|
+ int rc;
|
|
|
+
|
|
|
+ cpus = of_find_node_by_path("/cpus");
|
|
|
+ if (cpus == NULL) {
|
|
|
+ DBG("No /cpus node !\n");
|
|
|
+ return -ENODEV;
|
|
|
+ }
|
|
|
+
|
|
|
+ if (machine_is_compatible("PowerMac7,2") ||
|
|
|
+ machine_is_compatible("PowerMac7,3"))
|
|
|
+ rc = g5_pm72_cpufreq_init(cpus);
|
|
|
+ else if (machine_is_compatible("RackMac3,1"))
|
|
|
+ rc = g5_rm31_cpufreq_init(cpus);
|
|
|
+ else
|
|
|
+ rc = g5_neo2_cpufreq_init(cpus);
|
|
|
+
|
|
|
+ of_node_put(cpus);
|
|
|
+ return rc;
|
|
|
+}
|
|
|
+
|
|
|
module_init(g5_cpufreq_init);
|
|
|
|
|
|
|