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@@ -555,8 +555,13 @@ bool ath9k_hw_resettxqueue(struct ath_hw *ah, u32 q)
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REGWRITE_BUFFER_FLUSH(ah);
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DISABLE_REGWRITE_BUFFER(ah);
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- /* cwmin and cwmax should be 0 for beacon queue */
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- if (AR_SREV_9300_20_OR_LATER(ah)) {
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+ /*
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+ * cwmin and cwmax should be 0 for beacon queue
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+ * but not for IBSS as we would create an imbalance
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+ * on beaconing fairness for participating nodes.
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+ */
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+ if (AR_SREV_9300_20_OR_LATER(ah) &&
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+ ah->opmode != NL80211_IFTYPE_ADHOC) {
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REG_WRITE(ah, AR_DLCL_IFS(q), SM(0, AR_D_LCL_IFS_CWMIN)
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| SM(0, AR_D_LCL_IFS_CWMAX)
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| SM(qi->tqi_aifs, AR_D_LCL_IFS_AIFS));
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