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@@ -9858,6 +9858,15 @@ static int bnx2x_84833_hw_reset_phy(struct bnx2x_phy *phy,
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other_shmem_base_addr));
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u32 shmem_base_path[2];
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+
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+ /* Work around for 84833 LED failure inside RESET status */
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+ bnx2x_cl45_write(bp, phy, MDIO_AN_DEVAD,
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+ MDIO_AN_REG_8481_LEGACY_MII_CTRL,
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+ MDIO_AN_REG_8481_MII_CTRL_FORCE_1G);
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+ bnx2x_cl45_write(bp, phy, MDIO_AN_DEVAD,
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+ MDIO_AN_REG_8481_1G_100T_EXT_CTRL,
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+ MIDO_AN_REG_8481_EXT_CTRL_FORCE_LEDS_OFF);
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+
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shmem_base_path[0] = params->shmem_base;
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shmem_base_path[1] = other_shmem_base_addr;
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