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@@ -205,3 +205,143 @@ int setup_profiling_timer(unsigned int multiplier)
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return 0;
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}
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+static void flush_tlb_all_ipi(void *info)
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+{
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+ local_flush_tlb_all();
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+}
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+
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+void flush_tlb_all(void)
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+{
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+ on_each_cpu(flush_tlb_all_ipi, 0, 1, 1);
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+}
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+
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+static void flush_tlb_mm_ipi(void *mm)
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+{
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+ local_flush_tlb_mm((struct mm_struct *)mm);
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+}
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+
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+/*
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+ * The following tlb flush calls are invoked when old translations are
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+ * being torn down, or pte attributes are changing. For single threaded
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+ * address spaces, a new context is obtained on the current cpu, and tlb
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+ * context on other cpus are invalidated to force a new context allocation
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+ * at switch_mm time, should the mm ever be used on other cpus. For
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+ * multithreaded address spaces, intercpu interrupts have to be sent.
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+ * Another case where intercpu interrupts are required is when the target
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+ * mm might be active on another cpu (eg debuggers doing the flushes on
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+ * behalf of debugees, kswapd stealing pages from another process etc).
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+ * Kanoj 07/00.
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+ */
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+
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+void flush_tlb_mm(struct mm_struct *mm)
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+{
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+ preempt_disable();
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+
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+ if ((atomic_read(&mm->mm_users) != 1) || (current->mm != mm)) {
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+ smp_call_function(flush_tlb_mm_ipi, (void *)mm, 1, 1);
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+ } else {
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+ int i;
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+ for (i = 0; i < num_online_cpus(); i++)
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+ if (smp_processor_id() != i)
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+ cpu_context(i, mm) = 0;
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+ }
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+ local_flush_tlb_mm(mm);
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+
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+ preempt_enable();
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+}
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+
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+struct flush_tlb_data {
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+ struct vm_area_struct *vma;
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+ unsigned long addr1;
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+ unsigned long addr2;
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+};
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+
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+static void flush_tlb_range_ipi(void *info)
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+{
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+ struct flush_tlb_data *fd = (struct flush_tlb_data *)info;
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+
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+ local_flush_tlb_range(fd->vma, fd->addr1, fd->addr2);
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+}
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+
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+void flush_tlb_range(struct vm_area_struct *vma,
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+ unsigned long start, unsigned long end)
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+{
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+ struct mm_struct *mm = vma->vm_mm;
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+
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+ preempt_disable();
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+ if ((atomic_read(&mm->mm_users) != 1) || (current->mm != mm)) {
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+ struct flush_tlb_data fd;
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+
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+ fd.vma = vma;
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+ fd.addr1 = start;
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+ fd.addr2 = end;
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+ smp_call_function(flush_tlb_range_ipi, (void *)&fd, 1, 1);
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+ } else {
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+ int i;
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+ for (i = 0; i < num_online_cpus(); i++)
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+ if (smp_processor_id() != i)
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+ cpu_context(i, mm) = 0;
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+ }
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+ local_flush_tlb_range(vma, start, end);
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+ preempt_enable();
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+}
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+
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+static void flush_tlb_kernel_range_ipi(void *info)
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+{
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+ struct flush_tlb_data *fd = (struct flush_tlb_data *)info;
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+
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+ local_flush_tlb_kernel_range(fd->addr1, fd->addr2);
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+}
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+
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+void flush_tlb_kernel_range(unsigned long start, unsigned long end)
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+{
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+ struct flush_tlb_data fd;
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+
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+ fd.addr1 = start;
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+ fd.addr2 = end;
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+ on_each_cpu(flush_tlb_kernel_range_ipi, (void *)&fd, 1, 1);
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+}
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+
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+static void flush_tlb_page_ipi(void *info)
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+{
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+ struct flush_tlb_data *fd = (struct flush_tlb_data *)info;
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+
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+ local_flush_tlb_page(fd->vma, fd->addr1);
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+}
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+
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+void flush_tlb_page(struct vm_area_struct *vma, unsigned long page)
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+{
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+ preempt_disable();
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+ if ((atomic_read(&vma->vm_mm->mm_users) != 1) ||
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+ (current->mm != vma->vm_mm)) {
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+ struct flush_tlb_data fd;
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+
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+ fd.vma = vma;
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+ fd.addr1 = page;
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+ smp_call_function(flush_tlb_page_ipi, (void *)&fd, 1, 1);
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+ } else {
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+ int i;
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+ for (i = 0; i < num_online_cpus(); i++)
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+ if (smp_processor_id() != i)
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+ cpu_context(i, vma->vm_mm) = 0;
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+ }
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+ local_flush_tlb_page(vma, page);
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+ preempt_enable();
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+}
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+
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+static void flush_tlb_one_ipi(void *info)
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+{
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+ struct flush_tlb_data *fd = (struct flush_tlb_data *)info;
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+ local_flush_tlb_one(fd->addr1, fd->addr2);
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+}
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+
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+void flush_tlb_one(unsigned long asid, unsigned long vaddr)
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+{
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+ struct flush_tlb_data fd;
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+
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+ fd.addr1 = asid;
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+ fd.addr2 = vaddr;
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+
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+ smp_call_function(flush_tlb_one_ipi, (void *)&fd, 1, 1);
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+ local_flush_tlb_one(asid, vaddr);
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+}
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