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@@ -10,6 +10,7 @@
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* ARM architecture version 6 TLB handling functions.
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* These assume a split I/D TLB.
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*/
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+#include <linux/init.h>
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#include <linux/linkage.h>
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#include <asm/asm-offsets.h>
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#include <asm/page.h>
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@@ -87,7 +88,7 @@ ENTRY(v6wbi_flush_kern_tlb_range)
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mcr p15, 0, r2, c7, c5, 4 @ prefetch flush
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mov pc, lr
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- .section ".text.init", #alloc, #execinstr
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+ __INIT
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.type v6wbi_tlb_fns, #object
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ENTRY(v6wbi_tlb_fns)
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