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@@ -18,6 +18,11 @@
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#define S3C2412_PWRMODECON S3C24XX_PWRREG(0x20)
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#define S3C2412_PWRCFG S3C24XX_PWRREG(0x24)
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+#define S3C2412_INFORM0 S3C24XX_PWRREG(0x70)
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+#define S3C2412_INFORM1 S3C24XX_PWRREG(0x74)
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+#define S3C2412_INFORM2 S3C24XX_PWRREG(0x78)
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+#define S3C2412_INFORM3 S3C24XX_PWRREG(0x7C)
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+
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#define S3C2412_PWRCFG_BATF_IGNORE (0<<0)
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#define S3C2412_PWRCFG_BATF_SLEEP (3<<0)
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#define S3C2412_PWRCFG_BATF_MASK (3<<0)
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