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@@ -44,6 +44,15 @@ static inline void highbank_set_core_pwr(void)
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writel_relaxed(1, sregs_base + SREG_CPU_PWR_CTRL(cpu));
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}
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+static inline void highbank_clear_core_pwr(void)
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+{
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+ int cpu = cpu_logical_map(smp_processor_id());
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+ if (scu_base_addr)
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+ scu_power_mode(scu_base_addr, SCU_PM_NORMAL);
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+ else
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+ writel_relaxed(0, sregs_base + SREG_CPU_PWR_CTRL(cpu));
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+}
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+
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static inline void highbank_set_pwr_suspend(void)
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{
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writel(HB_PWR_SUSPEND, sregs_base + HB_SREG_A9_PWR_REQ);
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@@ -68,4 +77,10 @@ static inline void highbank_set_pwr_hard_reset(void)
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highbank_set_core_pwr();
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}
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+static inline void highbank_clear_pwr_request(void)
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+{
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+ writel(~0UL, sregs_base + HB_SREG_A9_PWR_REQ);
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+ highbank_clear_core_pwr();
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+}
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+
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#endif
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