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@@ -71,7 +71,7 @@ struct xhci_cap_regs {
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u32 db_off;
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u32 run_regs_off;
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/* Reserved up to (CAPLENGTH - 0x1C) */
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-} __attribute__ ((packed));
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+};
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/* hc_capbase bitmasks */
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/* bits 7:0 - how long is the Capabilities register */
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@@ -180,7 +180,7 @@ struct xhci_op_regs {
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u32 reserved5;
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/* registers for ports 2-255 */
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u32 reserved6[NUM_PORT_REGS*254];
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-} __attribute__ ((packed));
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+};
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/* USBCMD - USB command - command bitmasks */
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/* start/stop HC execution - do not write unless HC is halted*/
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@@ -361,7 +361,7 @@ struct xhci_op_regs {
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/**
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- * struct intr_reg - Interrupt Register Set
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+ * struct xhci_intr_reg - Interrupt Register Set
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* @irq_pending: IMAN - Interrupt Management Register. Used to enable
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* interrupts and check for pending interrupts.
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* @irq_control: IMOD - Interrupt Moderation Register.
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@@ -377,14 +377,14 @@ struct xhci_op_regs {
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* position of the Enqueue Pointer." The HCD (Linux) processes those events and
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* updates the dequeue pointer.
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*/
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-struct intr_reg {
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+struct xhci_intr_reg {
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u32 irq_pending;
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u32 irq_control;
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u32 erst_size;
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u32 rsvd;
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u32 erst_base[2];
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u32 erst_dequeue[2];
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-} __attribute__ ((packed));
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+};
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/* irq_pending bitmasks */
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#define ER_IRQ_PENDING(p) ((p) & 0x1)
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@@ -428,10 +428,10 @@ struct intr_reg {
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* or larger accesses"
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*/
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struct xhci_run_regs {
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- u32 microframe_index;
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- u32 rsvd[7];
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- struct intr_reg ir_set[128];
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-} __attribute__ ((packed));
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+ u32 microframe_index;
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+ u32 rsvd[7];
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+ struct xhci_intr_reg ir_set[128];
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+};
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/**
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* struct doorbell_array
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@@ -440,7 +440,7 @@ struct xhci_run_regs {
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*/
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struct xhci_doorbell_array {
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u32 doorbell[256];
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-} __attribute__ ((packed));
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+};
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#define DB_TARGET_MASK 0xFFFFFF00
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#define DB_STREAM_ID_MASK 0x0000FFFF
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@@ -470,7 +470,7 @@ struct xhci_slot_ctx {
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u32 dev_state;
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/* offset 0x10 to 0x1f reserved for HC internal use */
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u32 reserved[4];
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-} __attribute__ ((packed));
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+};
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/* dev_info bitmasks */
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/* Route String - 0:19 */
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@@ -542,7 +542,7 @@ struct xhci_ep_ctx {
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u32 tx_info;
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/* offset 0x14 - 0x1f reserved for HC internal use */
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u32 reserved[3];
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-} __attribute__ ((packed));
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+};
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/* ep_info bitmasks */
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/*
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@@ -601,7 +601,7 @@ struct xhci_device_control {
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u32 rsvd[6];
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struct xhci_slot_ctx slot;
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struct xhci_ep_ctx ep[31];
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-} __attribute__ ((packed));
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+};
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/* drop context bitmasks */
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#define DROP_EP(x) (0x1 << x)
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@@ -644,7 +644,7 @@ struct xhci_device_context_array {
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u32 dev_context_ptrs[2*MAX_HC_SLOTS];
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/* private xHCD pointers */
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dma_addr_t dma;
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-} __attribute__ ((packed));
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+};
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/* TODO: write function to set the 64-bit device DMA address */
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/*
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* TODO: change this to be dynamically sized at HC mem init time since the HC
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@@ -657,7 +657,7 @@ struct xhci_stream_ctx {
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u32 stream_ring[2];
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/* offset 0x14 - 0x1f reserved for HC internal use */
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u32 reserved[2];
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-} __attribute__ ((packed));
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+};
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struct xhci_transfer_event {
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@@ -666,7 +666,7 @@ struct xhci_transfer_event {
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u32 transfer_len;
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/* This field is interpreted differently based on the type of TRB */
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u32 flags;
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-} __attribute__ ((packed));
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+};
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/** Transfer Event bit fields **/
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#define TRB_TO_EP_ID(p) (((p) >> 16) & 0x1f)
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@@ -747,7 +747,7 @@ struct xhci_link_trb {
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u32 segment_ptr[2];
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u32 intr_target;
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u32 control;
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-} __attribute__ ((packed));
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+};
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/* control bitfields */
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#define LINK_TOGGLE (0x1<<1)
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@@ -758,7 +758,7 @@ struct xhci_event_cmd {
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u32 cmd_trb[2];
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u32 status;
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u32 flags;
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-} __attribute__ ((packed));
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+};
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/* flags bitmasks */
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/* bits 16:23 are the virtual function ID */
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@@ -809,7 +809,7 @@ struct xhci_event_cmd {
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struct xhci_generic_trb {
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u32 field[4];
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-} __attribute__ ((packed));
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+};
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union xhci_trb {
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struct xhci_link_trb link;
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@@ -904,7 +904,7 @@ struct xhci_segment {
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/* private to HCD */
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struct xhci_segment *next;
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dma_addr_t dma;
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-} __attribute__ ((packed));
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+};
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struct xhci_td {
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struct list_head td_list;
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@@ -946,7 +946,7 @@ struct xhci_erst_entry {
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u32 seg_size;
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/* Set to zero */
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u32 rsvd;
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-} __attribute__ ((packed));
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+};
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struct xhci_erst {
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struct xhci_erst_entry *entries;
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@@ -980,7 +980,7 @@ struct xhci_hcd {
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struct xhci_run_regs __iomem *run_regs;
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struct xhci_doorbell_array __iomem *dba;
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/* Our HCD's current interrupter register set */
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- struct intr_reg __iomem *ir_set;
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+ struct xhci_intr_reg __iomem *ir_set;
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/* Cached register copies of read-only HC data */
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__u32 hcs_params1;
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@@ -1079,7 +1079,7 @@ static inline void xhci_writel(struct xhci_hcd *xhci,
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}
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/* xHCI debugging */
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-void xhci_print_ir_set(struct xhci_hcd *xhci, struct intr_reg *ir_set, int set_num);
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+void xhci_print_ir_set(struct xhci_hcd *xhci, struct xhci_intr_reg *ir_set, int set_num);
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void xhci_print_registers(struct xhci_hcd *xhci);
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void xhci_dbg_regs(struct xhci_hcd *xhci);
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void xhci_print_run_regs(struct xhci_hcd *xhci);
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