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@@ -40,7 +40,11 @@
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#define ASI_M_UNA01 0x01 /* Same here... */
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#define ASI_M_UNA01 0x01 /* Same here... */
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#define ASI_M_MXCC 0x02 /* Access to TI VIKING MXCC registers */
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#define ASI_M_MXCC 0x02 /* Access to TI VIKING MXCC registers */
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#define ASI_M_FLUSH_PROBE 0x03 /* Reference MMU Flush/Probe; rw, ss */
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#define ASI_M_FLUSH_PROBE 0x03 /* Reference MMU Flush/Probe; rw, ss */
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+#ifndef CONFIG_SPARC_LEON
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#define ASI_M_MMUREGS 0x04 /* MMU Registers; rw, ss */
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#define ASI_M_MMUREGS 0x04 /* MMU Registers; rw, ss */
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+#else
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+#define ASI_M_MMUREGS 0x19
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+#endif /* CONFIG_SPARC_LEON */
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#define ASI_M_TLBDIAG 0x05 /* MMU TLB only Diagnostics */
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#define ASI_M_TLBDIAG 0x05 /* MMU TLB only Diagnostics */
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#define ASI_M_DIAGS 0x06 /* Reference MMU Diagnostics */
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#define ASI_M_DIAGS 0x06 /* Reference MMU Diagnostics */
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#define ASI_M_IODIAG 0x07 /* MMU I/O TLB only Diagnostics */
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#define ASI_M_IODIAG 0x07 /* MMU I/O TLB only Diagnostics */
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