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@@ -262,8 +262,8 @@ bootmem_init_node(int node, int initrd_node, struct meminfo *mi)
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if (end_pfn < end)
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end_pfn = end;
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- map.physical = mi->bank[i].start;
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- map.virtual = __phys_to_virt(map.physical);
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+ map.pfn = __phys_to_pfn(mi->bank[i].start);
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+ map.virtual = __phys_to_virt(mi->bank[i].start);
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map.length = mi->bank[i].size;
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map.type = MT_MEMORY;
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@@ -365,7 +365,7 @@ static void __init bootmem_init(struct meminfo *mi)
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#ifdef CONFIG_XIP_KERNEL
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#error needs fixing
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- p->physical = CONFIG_XIP_PHYS_ADDR & PMD_MASK;
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+ p->pfn = __phys_to_pfn(CONFIG_XIP_PHYS_ADDR & PMD_MASK);
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p->virtual = (unsigned long)&_stext & PMD_MASK;
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p->length = ((unsigned long)&_etext - p->virtual + ~PMD_MASK) & PMD_MASK;
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p->type = MT_ROM;
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@@ -439,14 +439,14 @@ static void __init devicemaps_init(struct machine_desc *mdesc)
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* Map the cache flushing regions.
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*/
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#ifdef FLUSH_BASE
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- map.physical = FLUSH_BASE_PHYS;
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+ map.pfn = __phys_to_pfn(FLUSH_BASE_PHYS);
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map.virtual = FLUSH_BASE;
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map.length = PGDIR_SIZE;
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map.type = MT_CACHECLEAN;
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create_mapping(&map);
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#endif
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#ifdef FLUSH_BASE_MINICACHE
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- map.physical = FLUSH_BASE_PHYS + PGDIR_SIZE;
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+ map.pfn = __phys_to_pfn(FLUSH_BASE_PHYS + PGDIR_SIZE);
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map.virtual = FLUSH_BASE_MINICACHE;
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map.length = PGDIR_SIZE;
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map.type = MT_MINICLEAN;
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@@ -464,7 +464,7 @@ static void __init devicemaps_init(struct machine_desc *mdesc)
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* location (0xffff0000). If we aren't using high-vectors, also
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* create a mapping at the low-vectors virtual address.
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*/
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- map.physical = virt_to_phys(vectors);
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+ map.pfn = __phys_to_pfn(virt_to_phys(vectors));
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map.virtual = 0xffff0000;
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map.length = PAGE_SIZE;
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map.type = MT_HIGH_VECTORS;
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