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+/*
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+ * Efika 5K2 platform code
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+ * Some code really inspired from the lite5200b platform.
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+ *
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+ * Copyright (C) 2006 bplan GmbH
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+ *
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+ * This file is licensed under the terms of the GNU General Public License
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+ * version 2. This program is licensed "as is" without any warranty of any
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+ * kind, whether express or implied.
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+ */
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+
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+#include <linux/errno.h>
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+#include <linux/kernel.h>
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+#include <linux/slab.h>
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+#include <linux/reboot.h>
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+#include <linux/init.h>
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+#include <linux/utsrelease.h>
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+#include <linux/seq_file.h>
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+#include <linux/string.h>
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+#include <linux/root_dev.h>
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+#include <linux/initrd.h>
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+#include <linux/timer.h>
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+#include <linux/pci.h>
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+
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+#include <asm/io.h>
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+#include <asm/irq.h>
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+#include <asm/sections.h>
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+#include <asm/pci-bridge.h>
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+#include <asm/pgtable.h>
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+#include <asm/prom.h>
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+#include <asm/time.h>
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+#include <asm/machdep.h>
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+#include <asm/rtas.h>
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+#include <asm/of_device.h>
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+#include <asm/of_platform.h>
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+#include <asm/mpc52xx.h>
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+
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+
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+#define EFIKA_PLATFORM_NAME "Efika"
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+
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+
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+/* ------------------------------------------------------------------------ */
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+/* PCI accesses thru RTAS */
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+/* ------------------------------------------------------------------------ */
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+
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+#ifdef CONFIG_PCI
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+
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+/*
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+ * Access functions for PCI config space using RTAS calls.
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+ */
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+static int rtas_read_config(struct pci_bus *bus, unsigned int devfn, int offset,
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+ int len, u32 * val)
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+{
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+ struct pci_controller *hose = bus->sysdata;
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+ unsigned long addr = (offset & 0xff) | ((devfn & 0xff) << 8)
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+ | (((bus->number - hose->first_busno) & 0xff) << 16)
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+ | (hose->index << 24);
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+ int ret = -1;
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+ int rval;
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+
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+ rval = rtas_call(rtas_token("read-pci-config"), 2, 2, &ret, addr, len);
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+ *val = ret;
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+ return rval ? PCIBIOS_DEVICE_NOT_FOUND : PCIBIOS_SUCCESSFUL;
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+}
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+
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+static int rtas_write_config(struct pci_bus *bus, unsigned int devfn,
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+ int offset, int len, u32 val)
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+{
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+ struct pci_controller *hose = bus->sysdata;
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+ unsigned long addr = (offset & 0xff) | ((devfn & 0xff) << 8)
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+ | (((bus->number - hose->first_busno) & 0xff) << 16)
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+ | (hose->index << 24);
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+ int rval;
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+
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+ rval = rtas_call(rtas_token("write-pci-config"), 3, 1, NULL,
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+ addr, len, val);
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+ return rval ? PCIBIOS_DEVICE_NOT_FOUND : PCIBIOS_SUCCESSFUL;
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+}
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+
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+static struct pci_ops rtas_pci_ops = {
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+ rtas_read_config,
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+ rtas_write_config
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+};
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+
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+
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+void __init efika_pcisetup(void)
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+{
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+ const int *bus_range;
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+ int len;
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+ struct pci_controller *hose;
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+ struct device_node *root;
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+ struct device_node *pcictrl;
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+
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+ root = of_find_node_by_path("/");
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+ if (root == NULL) {
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+ printk(KERN_WARNING EFIKA_PLATFORM_NAME
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+ ": Unable to find the root node\n");
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+ return;
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+ }
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+
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+ for (pcictrl = NULL;;) {
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+ pcictrl = of_get_next_child(root, pcictrl);
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+ if ((pcictrl == NULL) || (strcmp(pcictrl->name, "pci") == 0))
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+ break;
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+ }
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+
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+ of_node_put(root);
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+
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+ if (pcictrl == NULL) {
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+ printk(KERN_WARNING EFIKA_PLATFORM_NAME
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+ ": Unable to find the PCI bridge node\n");
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+ return;
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+ }
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+
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+ bus_range = get_property(pcictrl, "bus-range", &len);
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+ if (bus_range == NULL || len < 2 * sizeof(int)) {
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+ printk(KERN_WARNING EFIKA_PLATFORM_NAME
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+ ": Can't get bus-range for %s\n", pcictrl->full_name);
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+ return;
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+ }
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+
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+ if (bus_range[1] == bus_range[0])
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+ printk(KERN_INFO EFIKA_PLATFORM_NAME ": PCI bus %d",
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+ bus_range[0]);
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+ else
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+ printk(KERN_INFO EFIKA_PLATFORM_NAME ": PCI buses %d..%d",
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+ bus_range[0], bus_range[1]);
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+ printk(" controlled by %s\n", pcictrl->full_name);
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+ printk("\n");
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+
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+ hose = pcibios_alloc_controller();
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+ if (!hose) {
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+ printk(KERN_WARNING EFIKA_PLATFORM_NAME
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+ ": Can't allocate PCI controller structure for %s\n",
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+ pcictrl->full_name);
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+ return;
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+ }
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+
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+ hose->arch_data = of_node_get(pcictrl);
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+ hose->first_busno = bus_range[0];
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+ hose->last_busno = bus_range[1];
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+ hose->ops = &rtas_pci_ops;
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+
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+ pci_process_bridge_OF_ranges(hose, pcictrl, 0);
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+}
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+
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+#else
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+void __init efika_pcisetup(void)
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+{}
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+#endif
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+
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+
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+
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+/* ------------------------------------------------------------------------ */
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+/* Platform setup */
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+/* ------------------------------------------------------------------------ */
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+
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+static void efika_show_cpuinfo(struct seq_file *m)
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+{
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+ struct device_node *root;
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+ const char *revision = NULL;
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+ const char *codegendescription = NULL;
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+ const char *codegenvendor = NULL;
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+
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+ root = of_find_node_by_path("/");
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+ if (!root)
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+ return;
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+
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+ revision = get_property(root, "revision", NULL);
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+ codegendescription =
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+ get_property(root, "CODEGEN,description", NULL);
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+ codegenvendor = get_property(root, "CODEGEN,vendor", NULL);
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+
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+ if (codegendescription)
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+ seq_printf(m, "machine\t\t: %s\n", codegendescription);
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+ else
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+ seq_printf(m, "machine\t\t: Efika\n");
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+
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+ if (revision)
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+ seq_printf(m, "revision\t: %s\n", revision);
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+
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+ if (codegenvendor)
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+ seq_printf(m, "vendor\t\t: %s\n", codegenvendor);
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+
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+ of_node_put(root);
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+}
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+
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+static void __init efika_setup_arch(void)
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+{
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+ rtas_initialize();
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+
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+#ifdef CONFIG_BLK_DEV_INITRD
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+ initrd_below_start_ok = 1;
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+
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+ if (initrd_start)
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+ ROOT_DEV = Root_RAM0;
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+ else
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+#endif
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+ ROOT_DEV = Root_SDA2; /* sda2 (sda1 is for the kernel) */
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+
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+ efika_pcisetup();
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+
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+ if (ppc_md.progress)
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+ ppc_md.progress("Linux/PPC " UTS_RELEASE " running on Efika ;-)\n", 0x0);
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+}
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+
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+static int __init efika_probe(void)
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+{
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+ char *model = of_get_flat_dt_prop(of_get_flat_dt_root(),
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+ "model", NULL);
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+
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+ if (model == NULL)
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+ return 0;
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+ if (strcmp(model, "EFIKA5K2"))
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+ return 0;
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+
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+ ISA_DMA_THRESHOLD = ~0L;
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+ DMA_MODE_READ = 0x44;
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+ DMA_MODE_WRITE = 0x48;
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+
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+ return 1;
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+}
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+
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+define_machine(efika)
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+{
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+ .name = EFIKA_PLATFORM_NAME,
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+ .probe = efika_probe,
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+ .setup_arch = efika_setup_arch,
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+ .init = mpc52xx_declare_of_platform_devices,
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+ .show_cpuinfo = efika_show_cpuinfo,
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+ .init_IRQ = mpc52xx_init_irq,
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+ .get_irq = mpc52xx_get_irq,
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+ .restart = rtas_restart,
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+ .power_off = rtas_power_off,
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+ .halt = rtas_halt,
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+ .set_rtc_time = rtas_set_rtc_time,
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+ .get_rtc_time = rtas_get_rtc_time,
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+ .progress = rtas_progress,
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+ .get_boot_time = rtas_get_boot_time,
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+ .calibrate_decr = generic_calibrate_decr,
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+ .phys_mem_access_prot = pci_phys_mem_access_prot,
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+};
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+
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