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@@ -22,6 +22,8 @@
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#include <linux/clk.h>
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#include <linux/clk.h>
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#include <linux/platform_device.h>
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#include <linux/platform_device.h>
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#include <linux/io.h>
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#include <linux/io.h>
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+#include <mach/board.h>
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+#include <mach/cpu.h>
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/* Register definitions based on AT91SAM9RL64 preliminary draft datasheet */
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/* Register definitions based on AT91SAM9RL64 preliminary draft datasheet */
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@@ -36,7 +38,9 @@
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#define ATMEL_TSADCC_LOWRES (1 << 4) /* Resolution selection */
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#define ATMEL_TSADCC_LOWRES (1 << 4) /* Resolution selection */
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#define ATMEL_TSADCC_SLEEP (1 << 5) /* Sleep mode */
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#define ATMEL_TSADCC_SLEEP (1 << 5) /* Sleep mode */
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#define ATMEL_TSADCC_PENDET (1 << 6) /* Pen Detect selection */
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#define ATMEL_TSADCC_PENDET (1 << 6) /* Pen Detect selection */
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+#define ATMEL_TSADCC_PRES (1 << 7) /* Pressure Measurement Selection */
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#define ATMEL_TSADCC_PRESCAL (0x3f << 8) /* Prescalar Rate Selection */
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#define ATMEL_TSADCC_PRESCAL (0x3f << 8) /* Prescalar Rate Selection */
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+#define ATMEL_TSADCC_EPRESCAL (0xff << 8) /* Prescalar Rate Selection (Extended) */
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#define ATMEL_TSADCC_STARTUP (0x7f << 16) /* Start Up time */
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#define ATMEL_TSADCC_STARTUP (0x7f << 16) /* Start Up time */
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#define ATMEL_TSADCC_SHTIM (0xf << 24) /* Sample & Hold time */
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#define ATMEL_TSADCC_SHTIM (0xf << 24) /* Sample & Hold time */
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#define ATMEL_TSADCC_PENDBC (0xf << 28) /* Pen Detect debouncing time */
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#define ATMEL_TSADCC_PENDBC (0xf << 28) /* Pen Detect debouncing time */
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@@ -84,7 +88,13 @@
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#define ATMEL_TSADCC_CDR4 0x40 /* Channel Data 4 */
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#define ATMEL_TSADCC_CDR4 0x40 /* Channel Data 4 */
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#define ATMEL_TSADCC_CDR5 0x44 /* Channel Data 5 */
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#define ATMEL_TSADCC_CDR5 0x44 /* Channel Data 5 */
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-#define ADC_CLOCK 1000000
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+#define ATMEL_TSADCC_XPOS 0x50
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+#define ATMEL_TSADCC_Z1DAT 0x54
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+#define ATMEL_TSADCC_Z2DAT 0x58
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+
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+#define PRESCALER_VAL(x) ((x) >> 8)
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+
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+#define ADC_DEFAULT_CLOCK 100000
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struct atmel_tsadcc {
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struct atmel_tsadcc {
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struct input_dev *input;
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struct input_dev *input;
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@@ -172,6 +182,7 @@ static int __devinit atmel_tsadcc_probe(struct platform_device *pdev)
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struct atmel_tsadcc *ts_dev;
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struct atmel_tsadcc *ts_dev;
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struct input_dev *input_dev;
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struct input_dev *input_dev;
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struct resource *res;
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struct resource *res;
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+ struct at91_tsadcc_data *pdata = pdev->dev.platform_data;
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int err = 0;
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int err = 0;
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unsigned int prsc;
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unsigned int prsc;
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unsigned int reg;
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unsigned int reg;
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@@ -254,19 +265,37 @@ static int __devinit atmel_tsadcc_probe(struct platform_device *pdev)
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prsc = clk_get_rate(ts_dev->clk);
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prsc = clk_get_rate(ts_dev->clk);
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dev_info(&pdev->dev, "Master clock is set at: %d Hz\n", prsc);
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dev_info(&pdev->dev, "Master clock is set at: %d Hz\n", prsc);
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- prsc = prsc / ADC_CLOCK / 2 - 1;
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+ if (!pdata)
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+ goto err_fail;
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+
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+ if (!pdata->adc_clock)
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+ pdata->adc_clock = ADC_DEFAULT_CLOCK;
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+
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+ prsc = (prsc / (2 * pdata->adc_clock)) - 1;
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+
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+ /* saturate if this value is too high */
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+ if (cpu_is_at91sam9rl()) {
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+ if (prsc > PRESCALER_VAL(ATMEL_TSADCC_PRESCAL))
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+ prsc = PRESCALER_VAL(ATMEL_TSADCC_PRESCAL);
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+ } else {
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+ if (prsc > PRESCALER_VAL(ATMEL_TSADCC_EPRESCAL))
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+ prsc = PRESCALER_VAL(ATMEL_TSADCC_EPRESCAL);
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+ }
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+
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+ dev_info(&pdev->dev, "Prescaler is set at: %d\n", prsc);
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reg = ATMEL_TSADCC_TSAMOD_TS_ONLY_MODE |
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reg = ATMEL_TSADCC_TSAMOD_TS_ONLY_MODE |
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((0x00 << 5) & ATMEL_TSADCC_SLEEP) | /* Normal Mode */
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((0x00 << 5) & ATMEL_TSADCC_SLEEP) | /* Normal Mode */
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((0x01 << 6) & ATMEL_TSADCC_PENDET) | /* Enable Pen Detect */
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((0x01 << 6) & ATMEL_TSADCC_PENDET) | /* Enable Pen Detect */
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- ((prsc << 8) & ATMEL_TSADCC_PRESCAL) | /* PRESCAL */
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- ((0x13 << 16) & ATMEL_TSADCC_STARTUP) | /* STARTUP */
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- ((0x0F << 28) & ATMEL_TSADCC_PENDBC); /* PENDBC */
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+ (prsc << 8) |
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+ ((0x26 << 16) & ATMEL_TSADCC_STARTUP) |
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+ ((pdata->pendet_debounce << 28) & ATMEL_TSADCC_PENDBC);
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atmel_tsadcc_write(ATMEL_TSADCC_CR, ATMEL_TSADCC_SWRST);
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atmel_tsadcc_write(ATMEL_TSADCC_CR, ATMEL_TSADCC_SWRST);
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atmel_tsadcc_write(ATMEL_TSADCC_MR, reg);
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atmel_tsadcc_write(ATMEL_TSADCC_MR, reg);
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atmel_tsadcc_write(ATMEL_TSADCC_TRGR, ATMEL_TSADCC_TRGMOD_NONE);
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atmel_tsadcc_write(ATMEL_TSADCC_TRGR, ATMEL_TSADCC_TRGMOD_NONE);
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- atmel_tsadcc_write(ATMEL_TSADCC_TSR, (0x3 << 24) & ATMEL_TSADCC_TSSHTIM);
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+ atmel_tsadcc_write(ATMEL_TSADCC_TSR,
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+ (pdata->ts_sample_hold_time << 24) & ATMEL_TSADCC_TSSHTIM);
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atmel_tsadcc_read(ATMEL_TSADCC_SR);
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atmel_tsadcc_read(ATMEL_TSADCC_SR);
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atmel_tsadcc_write(ATMEL_TSADCC_IER, ATMEL_TSADCC_PENCNT);
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atmel_tsadcc_write(ATMEL_TSADCC_IER, ATMEL_TSADCC_PENCNT);
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