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@@ -0,0 +1,53 @@
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+CAN Device Tree Bindings
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+------------------------
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+
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+(c) 2006-2009 Secret Lab Technologies Ltd
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+Grant Likely <grant.likely@secretlab.ca>
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+
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+fsl,mpc5200-mscan nodes
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+-----------------------
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+In addition to the required compatible-, reg- and interrupt-properties, you can
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+also specify which clock source shall be used for the controller:
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+
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+- fsl,mscan-clock-source : a string describing the clock source. Valid values
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+ are: "ip" for ip bus clock
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+ "ref" for reference clock (XTAL)
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+ "ref" is default in case this property is not
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+ present.
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+
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+fsl,mpc5121-mscan nodes
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+-----------------------
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+In addition to the required compatible-, reg- and interrupt-properties, you can
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+also specify which clock source and divider shall be used for the controller:
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+
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+- fsl,mscan-clock-source : a string describing the clock source. Valid values
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+ are: "ip" for ip bus clock
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+ "ref" for reference clock
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+ "sys" for system clock
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+ If this property is not present, an optimal CAN
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+ clock source and frequency based on the system
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+ clock will be selected. If this is not possible,
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+ the reference clock will be used.
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+
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+- fsl,mscan-clock-divider: for the reference and system clock, an additional
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+ clock divider can be specified. By default, a
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+ value of 1 is used.
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+
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+Note that the MPC5121 Rev. 1 processor is not supported.
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+
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+Examples:
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+ can@1300 {
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+ compatible = "fsl,mpc5121-mscan";
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+ interrupts = <12 0x8>;
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+ interrupt-parent = <&ipic>;
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+ reg = <0x1300 0x80>;
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+ };
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+
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+ can@1380 {
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+ compatible = "fsl,mpc5121-mscan";
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+ interrupts = <13 0x8>;
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+ interrupt-parent = <&ipic>;
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+ reg = <0x1380 0x80>;
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+ fsl,mscan-clock-source = "ref";
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+ fsl,mscan-clock-divider = <3>;
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+ };
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