|
@@ -271,26 +271,27 @@ void r600_set_power_state(struct radeon_device *rdev, bool static_switch)
|
|
radeon_pm_misc(rdev);
|
|
radeon_pm_misc(rdev);
|
|
|
|
|
|
if (static_switch) {
|
|
if (static_switch) {
|
|
- radeon_pm_prepare(rdev);
|
|
|
|
|
|
+
|
|
/* set engine clock */
|
|
/* set engine clock */
|
|
if (sclk != rdev->pm.current_sclk) {
|
|
if (sclk != rdev->pm.current_sclk) {
|
|
radeon_set_engine_clock(rdev, sclk);
|
|
radeon_set_engine_clock(rdev, sclk);
|
|
rdev->pm.current_sclk = sclk;
|
|
rdev->pm.current_sclk = sclk;
|
|
DRM_INFO("Setting: e: %d\n", sclk);
|
|
DRM_INFO("Setting: e: %d\n", sclk);
|
|
}
|
|
}
|
|
-#if 0
|
|
|
|
|
|
+
|
|
/* set memory clock */
|
|
/* set memory clock */
|
|
if (rdev->asic->set_memory_clock && (mclk != rdev->pm.current_mclk)) {
|
|
if (rdev->asic->set_memory_clock && (mclk != rdev->pm.current_mclk)) {
|
|
|
|
+ radeon_pm_prepare(rdev);
|
|
radeon_set_memory_clock(rdev, mclk);
|
|
radeon_set_memory_clock(rdev, mclk);
|
|
|
|
+ radeon_pm_finish(rdev);
|
|
rdev->pm.current_mclk = mclk;
|
|
rdev->pm.current_mclk = mclk;
|
|
DRM_INFO("Setting: m: %d\n", mclk);
|
|
DRM_INFO("Setting: m: %d\n", mclk);
|
|
}
|
|
}
|
|
-#endif
|
|
|
|
- radeon_pm_finish(rdev);
|
|
|
|
|
|
+
|
|
} else {
|
|
} else {
|
|
- /* set engine clock */
|
|
|
|
|
|
+ radeon_sync_with_vblank(rdev);
|
|
|
|
+
|
|
if (sclk != rdev->pm.current_sclk) {
|
|
if (sclk != rdev->pm.current_sclk) {
|
|
- radeon_sync_with_vblank(rdev);
|
|
|
|
radeon_pm_debug_check_in_vbl(rdev, false);
|
|
radeon_pm_debug_check_in_vbl(rdev, false);
|
|
radeon_set_engine_clock(rdev, sclk);
|
|
radeon_set_engine_clock(rdev, sclk);
|
|
radeon_pm_debug_check_in_vbl(rdev, true);
|
|
radeon_pm_debug_check_in_vbl(rdev, true);
|
|
@@ -298,10 +299,8 @@ void r600_set_power_state(struct radeon_device *rdev, bool static_switch)
|
|
DRM_INFO("Setting: e: %d\n", sclk);
|
|
DRM_INFO("Setting: e: %d\n", sclk);
|
|
}
|
|
}
|
|
|
|
|
|
-#if 0
|
|
|
|
/* set memory clock */
|
|
/* set memory clock */
|
|
if (rdev->asic->set_memory_clock && (mclk != rdev->pm.current_mclk)) {
|
|
if (rdev->asic->set_memory_clock && (mclk != rdev->pm.current_mclk)) {
|
|
- radeon_sync_with_vblank(rdev);
|
|
|
|
radeon_pm_debug_check_in_vbl(rdev, false);
|
|
radeon_pm_debug_check_in_vbl(rdev, false);
|
|
radeon_pm_prepare(rdev);
|
|
radeon_pm_prepare(rdev);
|
|
radeon_set_memory_clock(rdev, mclk);
|
|
radeon_set_memory_clock(rdev, mclk);
|
|
@@ -310,7 +309,6 @@ void r600_set_power_state(struct radeon_device *rdev, bool static_switch)
|
|
rdev->pm.current_mclk = mclk;
|
|
rdev->pm.current_mclk = mclk;
|
|
DRM_INFO("Setting: m: %d\n", mclk);
|
|
DRM_INFO("Setting: m: %d\n", mclk);
|
|
}
|
|
}
|
|
-#endif
|
|
|
|
}
|
|
}
|
|
|
|
|
|
rdev->pm.current_power_state_index = rdev->pm.requested_power_state_index;
|
|
rdev->pm.current_power_state_index = rdev->pm.requested_power_state_index;
|