|
@@ -1183,8 +1183,9 @@ EXPORT_SYMBOL(il_power_update_mode);
|
|
|
void
|
|
|
il_power_initialize(struct il_priv *il)
|
|
|
{
|
|
|
- u16 lctl = il_pcie_link_ctl(il);
|
|
|
+ u16 lctl;
|
|
|
|
|
|
+ pcie_capability_read_word(il->pci_dev, PCI_EXP_LNKCTL, &lctl);
|
|
|
il->power_data.pci_pm = !(lctl & PCI_CFG_LINK_CTRL_VAL_L0S_EN);
|
|
|
|
|
|
il->power_data.debug_sleep_level_override = -1;
|
|
@@ -4233,7 +4234,7 @@ il_apm_init(struct il_priv *il)
|
|
|
* power savings, even without L1.
|
|
|
*/
|
|
|
if (il->cfg->set_l0s) {
|
|
|
- lctl = il_pcie_link_ctl(il);
|
|
|
+ pcie_capability_read_word(il->pci_dev, PCI_EXP_LNKCTL, &lctl);
|
|
|
if ((lctl & PCI_CFG_LINK_CTRL_VAL_L1_EN) ==
|
|
|
PCI_CFG_LINK_CTRL_VAL_L1_EN) {
|
|
|
/* L1-ASPM enabled; disable(!) L0S */
|