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@@ -727,7 +727,10 @@ ppc4xx_edac_handle_ce(struct mem_ctl_info *mci,
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for (row = 0; row < mci->nr_csrows; row++)
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if (ppc4xx_edac_check_bank_error(status, row))
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- edac_mc_handle_ce_no_info(mci, message);
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+ edac_mc_handle_error(HW_EVENT_ERR_CORRECTED, mci,
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+ 0, 0, 0,
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+ row, 0, -1,
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+ message, "", NULL);
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}
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/**
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@@ -755,7 +758,10 @@ ppc4xx_edac_handle_ue(struct mem_ctl_info *mci,
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for (row = 0; row < mci->nr_csrows; row++)
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if (ppc4xx_edac_check_bank_error(status, row))
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- edac_mc_handle_ue(mci, page, offset, row, message);
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+ edac_mc_handle_error(HW_EVENT_ERR_UNCORRECTED, mci,
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+ page, offset, 0,
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+ row, 0, -1,
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+ message, "", NULL);
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}
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/**
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@@ -1233,6 +1239,7 @@ static int __devinit ppc4xx_edac_probe(struct platform_device *op)
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dcr_host_t dcr_host;
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const struct device_node *np = op->dev.of_node;
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struct mem_ctl_info *mci = NULL;
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+ struct edac_mc_layer layers[2];
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static int ppc4xx_edac_instance;
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/*
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@@ -1278,12 +1285,14 @@ static int __devinit ppc4xx_edac_probe(struct platform_device *op)
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* controller instance and perform the appropriate
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* initialization.
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*/
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-
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- mci = edac_mc_alloc(sizeof(struct ppc4xx_edac_pdata),
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- ppc4xx_edac_nr_csrows,
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- ppc4xx_edac_nr_chans,
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- ppc4xx_edac_instance);
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-
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+ layers[0].type = EDAC_MC_LAYER_CHIP_SELECT;
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+ layers[0].size = ppc4xx_edac_nr_csrows;
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+ layers[0].is_virt_csrow = true;
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+ layers[1].type = EDAC_MC_LAYER_CHANNEL;
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+ layers[1].size = ppc4xx_edac_nr_chans;
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+ layers[1].is_virt_csrow = false;
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+ mci = new_edac_mc_alloc(ppc4xx_edac_instance, ARRAY_SIZE(layers), layers,
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+ sizeof(struct ppc4xx_edac_pdata));
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if (mci == NULL) {
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ppc4xx_edac_printk(KERN_ERR, "%s: "
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"Failed to allocate EDAC MC instance!\n",
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