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@@ -737,7 +737,6 @@ static struct clk ssi_l4_ick = {
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* divided value of fclk.
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*
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*/
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-/* XXX REVISIT: GFX clock is part of CONFIG_PARTICIPANT, no? doublecheck. */
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/* This clksel struct is shared between gfx_3d_fck and gfx_2d_fck */
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static const struct clksel gfx_fck_clksel[] = {
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@@ -764,6 +763,7 @@ static struct clk gfx_2d_fck = {
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.name = "gfx_2d_fck",
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.ops = &clkops_omap2_dflt_wait,
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.parent = &core_l3_ck,
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+ .flags = DELAYED_APP | CONFIG_PARTICIPANT,
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.clkdm_name = "gfx_clkdm",
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.enable_reg = OMAP_CM_REGADDR(GFX_MOD, CM_FCLKEN),
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.enable_bit = OMAP24XX_EN_2D_SHIFT,
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@@ -779,6 +779,7 @@ static struct clk gfx_ick = {
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.name = "gfx_ick", /* From l3 */
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.ops = &clkops_omap2_dflt_wait,
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.parent = &core_l3_ck,
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+ .flags = DELAYED_APP | CONFIG_PARTICIPANT,
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.clkdm_name = "gfx_clkdm",
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.enable_reg = OMAP_CM_REGADDR(GFX_MOD, CM_ICLKEN),
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.enable_bit = OMAP_EN_GFX_SHIFT,
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