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@@ -81,9 +81,10 @@ struct d40_lli_pool {
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* lli_len equals one.
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* @lli_log: Same as above but for logical channels.
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* @lli_pool: The pool with two entries pre-allocated.
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- * @lli_len: Number of LLI's in lli_pool
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- * @lli_tcount: Number of LLIs processed in the transfer. When equals lli_len
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- * then this transfer job is done.
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+ * @lli_len: Number of llis of current descriptor.
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+ * @lli_count: Number of transfered llis.
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+ * @lli_tx_len: Max number of LLIs per transfer, there can be
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+ * many transfer for one descriptor.
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* @txd: DMA engine struct. Used for among other things for communication
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* during a transfer.
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* @node: List entry.
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@@ -100,8 +101,9 @@ struct d40_desc {
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struct d40_log_lli_bidir lli_log;
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struct d40_lli_pool lli_pool;
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- u32 lli_len;
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- u32 lli_tcount;
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+ int lli_len;
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+ int lli_count;
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+ u32 lli_tx_len;
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struct dma_async_tx_descriptor txd;
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struct list_head node;
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@@ -365,11 +367,6 @@ static dma_cookie_t d40_assign_cookie(struct d40_chan *d40c,
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return cookie;
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}
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-static void d40_desc_reset(struct d40_desc *d40d)
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-{
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- d40d->lli_tcount = 0;
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-}
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-
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static void d40_desc_remove(struct d40_desc *d40d)
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{
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list_del(&d40d->node);
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@@ -738,25 +735,18 @@ static void d40_desc_load(struct d40_chan *d40c, struct d40_desc *d40d)
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d40c->phy_chan->num,
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d40d->lli_phy.dst,
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d40d->lli_phy.src);
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- d40d->lli_tcount = d40d->lli_len;
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} else if (d40d->lli_log.dst && d40d->lli_log.src) {
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- u32 lli_len;
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struct d40_log_lli *src = d40d->lli_log.src;
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struct d40_log_lli *dst = d40d->lli_log.dst;
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- src += d40d->lli_tcount;
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- dst += d40d->lli_tcount;
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-
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- if (d40d->lli_len <= d40c->base->plat_data->llis_per_log)
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- lli_len = d40d->lli_len;
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- else
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- lli_len = d40c->base->plat_data->llis_per_log;
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- d40d->lli_tcount += lli_len;
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+ src += d40d->lli_count;
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+ dst += d40d->lli_count;
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d40_log_lli_write(d40c->lcpa, d40c->lcla.src,
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d40c->lcla.dst,
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dst, src,
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d40c->base->plat_data->llis_per_log);
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}
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+ d40d->lli_count += d40d->lli_tx_len;
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}
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static dma_cookie_t d40_tx_submit(struct dma_async_tx_descriptor *tx)
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@@ -838,7 +828,7 @@ static void dma_tc_handle(struct d40_chan *d40c)
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if (d40d == NULL)
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return;
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- if (d40d->lli_tcount < d40d->lli_len) {
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+ if (d40d->lli_count < d40d->lli_len) {
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d40_desc_load(d40c, d40d);
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/* Start dma job */
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@@ -891,7 +881,6 @@ static void dma_tasklet(unsigned long data)
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/* Return desc to free-list */
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d40_desc_free(d40c, d40d_fin);
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} else {
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- d40_desc_reset(d40d_fin);
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if (!d40d_fin->is_in_client_list) {
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d40_desc_remove(d40d_fin);
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list_add_tail(&d40d_fin->node, &d40c->client);
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@@ -1573,7 +1562,6 @@ struct dma_async_tx_descriptor *stedma40_memcpy_sg(struct dma_chan *chan,
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struct d40_chan *d40c = container_of(chan, struct d40_chan,
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chan);
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unsigned long flg;
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- int lli_max = d40c->base->plat_data->llis_per_log;
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spin_lock_irqsave(&d40c->lock, flg);
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@@ -1584,10 +1572,13 @@ struct dma_async_tx_descriptor *stedma40_memcpy_sg(struct dma_chan *chan,
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memset(d40d, 0, sizeof(struct d40_desc));
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d40d->lli_len = sgl_len;
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-
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+ d40d->lli_tx_len = d40d->lli_len;
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d40d->txd.flags = flags;
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if (d40c->log_num != D40_PHY_CHAN) {
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+ if (d40d->lli_len > d40c->base->plat_data->llis_per_log)
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+ d40d->lli_tx_len = d40c->base->plat_data->llis_per_log;
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+
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if (sgl_len > 1)
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/*
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* Check if there is space available in lcla. If not,
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@@ -1596,7 +1587,7 @@ struct dma_async_tx_descriptor *stedma40_memcpy_sg(struct dma_chan *chan,
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*/
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if (d40_lcla_id_get(d40c,
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&d40c->base->lcla_pool) != 0)
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- lli_max = 1;
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+ d40d->lli_tx_len = 1;
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if (d40_pool_lli_alloc(d40d, sgl_len, true) < 0) {
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dev_err(&d40c->chan.dev->device,
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@@ -1610,7 +1601,8 @@ struct dma_async_tx_descriptor *stedma40_memcpy_sg(struct dma_chan *chan,
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d40d->lli_log.src,
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d40c->log_def.lcsp1,
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d40c->dma_cfg.src_info.data_width,
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- flags & DMA_PREP_INTERRUPT, lli_max,
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+ flags & DMA_PREP_INTERRUPT,
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+ d40d->lli_tx_len,
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d40c->base->plat_data->llis_per_log);
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(void) d40_log_sg_to_lli(d40c->lcla.dst_id,
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@@ -1619,7 +1611,8 @@ struct dma_async_tx_descriptor *stedma40_memcpy_sg(struct dma_chan *chan,
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d40d->lli_log.dst,
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d40c->log_def.lcsp3,
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d40c->dma_cfg.dst_info.data_width,
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- flags & DMA_PREP_INTERRUPT, lli_max,
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+ flags & DMA_PREP_INTERRUPT,
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+ d40d->lli_tx_len,
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d40c->base->plat_data->llis_per_log);
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@@ -1794,6 +1787,7 @@ static struct dma_async_tx_descriptor *d40_prep_memcpy(struct dma_chan *chan,
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goto err;
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}
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d40d->lli_len = 1;
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+ d40d->lli_tx_len = 1;
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d40_log_fill_lli(d40d->lli_log.src,
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src,
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@@ -1869,7 +1863,6 @@ static int d40_prep_slave_sg_log(struct d40_desc *d40d,
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{
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dma_addr_t dev_addr = 0;
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int total_size;
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- int lli_max = d40c->base->plat_data->llis_per_log;
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if (d40_pool_lli_alloc(d40d, sg_len, true) < 0) {
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dev_err(&d40c->chan.dev->device,
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@@ -1878,7 +1871,10 @@ static int d40_prep_slave_sg_log(struct d40_desc *d40d,
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}
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d40d->lli_len = sg_len;
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- d40d->lli_tcount = 0;
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+ if (d40d->lli_len <= d40c->base->plat_data->llis_per_log)
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+ d40d->lli_tx_len = d40d->lli_len;
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+ else
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+ d40d->lli_tx_len = d40c->base->plat_data->llis_per_log;
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if (sg_len > 1)
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/*
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@@ -1887,7 +1883,7 @@ static int d40_prep_slave_sg_log(struct d40_desc *d40d,
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* in lcpa space.
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*/
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if (d40_lcla_id_get(d40c, &d40c->base->lcla_pool) != 0)
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- lli_max = 1;
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+ d40d->lli_tx_len = 1;
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if (direction == DMA_FROM_DEVICE) {
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dev_addr = d40c->base->plat_data->dev_rx[d40c->dma_cfg.src_dev_type];
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@@ -1899,7 +1895,7 @@ static int d40_prep_slave_sg_log(struct d40_desc *d40d,
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d40c->dma_cfg.dst_info.data_width,
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direction,
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flags & DMA_PREP_INTERRUPT,
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- dev_addr, lli_max,
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+ dev_addr, d40d->lli_tx_len,
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d40c->base->plat_data->llis_per_log);
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} else if (direction == DMA_TO_DEVICE) {
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dev_addr = d40c->base->plat_data->dev_tx[d40c->dma_cfg.dst_dev_type];
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@@ -1911,7 +1907,7 @@ static int d40_prep_slave_sg_log(struct d40_desc *d40d,
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d40c->dma_cfg.dst_info.data_width,
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direction,
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flags & DMA_PREP_INTERRUPT,
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- dev_addr, lli_max,
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+ dev_addr, d40d->lli_tx_len,
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d40c->base->plat_data->llis_per_log);
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} else
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return -EINVAL;
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@@ -1939,7 +1935,7 @@ static int d40_prep_slave_sg_phy(struct d40_desc *d40d,
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}
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d40d->lli_len = sgl_len;
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- d40d->lli_tcount = 0;
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+ d40d->lli_tx_len = sgl_len;
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if (direction == DMA_FROM_DEVICE) {
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dst_dev_addr = 0;
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