Home Explore Help
Register Sign In
phyus
/
linux-vybrid_public
8
0
Fork 0
Files Issues 0 Pull Requests 0 Wiki
Browse Source

Blackfin arch: do not allow L2 to be cached on BF561 SMP

Signed-off-by: Bryan Wu <cooloney@kernel.org>
Mike Frysinger 16 years ago
parent
1ea9925553
commit
94106e0fb6
1 changed files with 1 additions and 1 deletions
Split View Show Diff Stats
  1. 1 1
      arch/blackfin/Kconfig

+ 1 - 1
arch/blackfin/Kconfig
View File 

@@ -866,7 +866,7 @@ endchoice
 
 
 config BFIN_L2_CACHEABLE
 
 	bool "Cache L2 SRAM"
 
-	depends on (BFIN_DCACHE || BFIN_ICACHE) && (BF54x || BF561)
 
+	depends on (BFIN_DCACHE || BFIN_ICACHE) && (BF54x || (BF561 && !SMP))
 
 	default n
 
 	help
 
 	  Select to make L2 SRAM cacheable in L1 data and instruction cache.