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@@ -48,6 +48,12 @@
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/* PLL Configuration register */
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#define SYS_PLL __REG(0xa0900188)
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+/* PLL FS status */
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+#define SYS_PLL_FS __REGBITS(24, 23)
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+
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+/* PLL ND status */
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+#define SYS_PLL_ND __REGBITS(20, 16)
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+
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/* PLL Configuration register: PLL SW change */
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#define SYS_PLL_SWC __REGBIT(15)
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#define SYS_PLL_SWC_NO __REGVAL(SYS_PLL_SWC, 0)
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