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@@ -1,5 +1,5 @@
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/*
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- * Copyright (c) 2010 Broadcom Corporation
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+ * Copyright (c) 2011 Broadcom Corporation
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*
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* Permission to use, copy, modify, and/or distribute this software for any
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* purpose with or without fee is hereby granted, provided that the above
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@@ -1220,7 +1220,6 @@ u32 si_pmu_ilp_clock(si_t *sih)
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u32 start, end, delta;
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u32 origidx = ai_coreidx(sih);
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chipcregs_t *cc = ai_setcoreidx(sih, SI_CC_IDX);
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- ASSERT(cc != NULL);
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start = R_REG(&cc->pmutimer);
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mdelay(ILP_CALC_DUR);
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end = R_REG(&cc->pmutimer);
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@@ -1473,7 +1472,6 @@ void si_pmu_spuravoid(si_t *sih, u8 spuravoid)
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/* wait for the ht to really go away */
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SPINWAIT(((R_REG(&cc->clk_ctl_st) & CCS_HTAVAIL) == 0),
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10000);
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- ASSERT((R_REG(&cc->clk_ctl_st) & CCS_HTAVAIL) == 0);
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}
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/* update the pll changes */
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@@ -1523,7 +1521,6 @@ void si_pmu_chip_init(si_t *sih)
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{
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uint origidx;
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-
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/* Gate off SPROM clock and chip select signals */
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si_pmu_sprom_enable(sih, false);
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@@ -1537,7 +1534,6 @@ void si_pmu_chip_init(si_t *sih)
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/* initialize PMU switch/regulators */
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void si_pmu_swreg_init(si_t *sih)
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{
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-
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switch (sih->chip) {
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case BCM4336_CHIP_ID:
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/* Reduce CLDO PWM output voltage to 1.2V */
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@@ -1566,7 +1562,6 @@ void si_pmu_pll_init(si_t *sih, uint xtalfreq)
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chipcregs_t *cc;
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uint origidx;
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-
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/* Remember original core before switch to chipc */
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origidx = ai_coreidx(sih);
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cc = ai_setcoreidx(sih, SI_CC_IDX);
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@@ -1736,7 +1731,6 @@ void si_pmu_res_init(si_t *sih)
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[pmu_res_depend_table_sz].depend_mask);
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break;
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default:
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- ASSERT(0);
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break;
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}
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}
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@@ -1783,11 +1777,9 @@ u32 si_pmu_measure_alpclk(si_t *sih)
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if (sih->pmurev < 10)
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return 0;
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-
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/* Remember original core before switch to chipc */
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origidx = ai_coreidx(sih);
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cc = ai_setcoreidx(sih, SI_CC_IDX);
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- ASSERT(cc != NULL);
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if (R_REG(&cc->pmustatus) & PST_EXTLPOAVAIL) {
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u32 ilp_ctr, alp_hz;
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