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@@ -8,12 +8,6 @@
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#define MTRRcap_MSR 0x0fe
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#define MTRRdefType_MSR 0x2ff
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-#define MTRRphysBase_MSR(reg) (0x200 + 2 * (reg))
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-#define MTRRphysMask_MSR(reg) (0x200 + 2 * (reg) + 1)
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-
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-#define MTRR_NUM_FIXED_RANGES 88
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-#define MTRR_MAX_VAR_RANGES 256
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-
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#define MTRRfix64K_00000_MSR 0x250
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#define MTRRfix16K_80000_MSR 0x258
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#define MTRRfix16K_A0000_MSR 0x259
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@@ -30,10 +24,6 @@
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#define MTRR_CHANGE_MASK_VARIABLE 0x02
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#define MTRR_CHANGE_MASK_DEFTYPE 0x04
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-/* In the Intel processor's MTRR interface, the MTRR type is always held in
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- an 8 bit field: */
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-typedef u8 mtrr_type;
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-
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extern unsigned int mtrr_usage_table[MTRR_MAX_VAR_RANGES];
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struct mtrr_ops {
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@@ -71,13 +61,6 @@ struct set_mtrr_context {
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u32 ccr3;
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};
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-struct mtrr_var_range {
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- u32 base_lo;
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- u32 base_hi;
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- u32 mask_lo;
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- u32 mask_hi;
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-};
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-
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void set_mtrr_done(struct set_mtrr_context *ctxt);
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void set_mtrr_cache_disable(struct set_mtrr_context *ctxt);
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void set_mtrr_prepare_save(struct set_mtrr_context *ctxt);
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