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@@ -910,9 +910,10 @@ static void assert_pll(struct drm_i915_private *dev_priv,
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/* For ILK+ */
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static void assert_pch_pll(struct drm_i915_private *dev_priv,
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- struct intel_crtc *intel_crtc, bool state)
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+ struct intel_pch_pll *pll,
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+ struct intel_crtc *crtc,
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+ bool state)
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{
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- int reg;
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u32 val;
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bool cur_state;
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@@ -921,30 +922,37 @@ static void assert_pch_pll(struct drm_i915_private *dev_priv,
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return;
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}
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- if (!intel_crtc->pch_pll) {
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- WARN(1, "asserting PCH PLL enabled with no PLL\n");
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+ if (WARN (!pll,
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+ "asserting PCH PLL %s with no PLL\n", state_string(state)))
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return;
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- }
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- if (HAS_PCH_CPT(dev_priv->dev)) {
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+ val = I915_READ(pll->pll_reg);
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+ cur_state = !!(val & DPLL_VCO_ENABLE);
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+ WARN(cur_state != state,
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+ "PCH PLL state for reg %x assertion failure (expected %s, current %s), val=%08x\n",
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+ pll->pll_reg, state_string(state), state_string(cur_state), val);
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+
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+ /* Make sure the selected PLL is correctly attached to the transcoder */
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+ if (crtc && HAS_PCH_CPT(dev_priv->dev)) {
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u32 pch_dpll;
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pch_dpll = I915_READ(PCH_DPLL_SEL);
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-
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- /* Make sure the selected PLL is enabled to the transcoder */
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- WARN(!((pch_dpll >> (4 * intel_crtc->pipe)) & 8),
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- "transcoder %d PLL not enabled\n", intel_crtc->pipe);
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+ cur_state = pll->pll_reg == _PCH_DPLL_B;
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+ if (!WARN(((pch_dpll >> (4 * crtc->pipe)) & 1) != cur_state,
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+ "PLL[%d] not attached to this transcoder %d: %08x\n",
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+ cur_state, crtc->pipe, pch_dpll)) {
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+ cur_state = !!(val >> (4*crtc->pipe + 3));
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+ WARN(cur_state != state,
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+ "PLL[%d] not %s on this transcoder %d: %08x\n",
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+ pll->pll_reg == _PCH_DPLL_B,
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+ state_string(state),
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+ crtc->pipe,
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+ val);
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+ }
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}
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-
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- reg = intel_crtc->pch_pll->pll_reg;
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- val = I915_READ(reg);
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- cur_state = !!(val & DPLL_VCO_ENABLE);
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- WARN(cur_state != state,
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- "PCH PLL state assertion failure (expected %s, current %s)\n",
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- state_string(state), state_string(cur_state));
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}
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-#define assert_pch_pll_enabled(d, p) assert_pch_pll(d, p, true)
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-#define assert_pch_pll_disabled(d, p) assert_pch_pll(d, p, false)
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+#define assert_pch_pll_enabled(d, p, c) assert_pch_pll(d, p, c, true)
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+#define assert_pch_pll_disabled(d, p, c) assert_pch_pll(d, p, c, false)
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static void assert_fdi_tx(struct drm_i915_private *dev_priv,
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enum pipe pipe, bool state)
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@@ -1424,7 +1432,7 @@ static void intel_enable_pch_pll(struct intel_crtc *intel_crtc)
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assert_pch_refclk_enabled(dev_priv);
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if (pll->active++ && pll->on) {
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- assert_pch_pll_enabled(dev_priv, intel_crtc);
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+ assert_pch_pll_enabled(dev_priv, pll, NULL);
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return;
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}
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@@ -1460,12 +1468,12 @@ static void intel_disable_pch_pll(struct intel_crtc *intel_crtc)
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intel_crtc->base.base.id);
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if (WARN_ON(pll->active == 0)) {
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- assert_pch_pll_disabled(dev_priv, intel_crtc);
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+ assert_pch_pll_disabled(dev_priv, pll, NULL);
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return;
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}
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if (--pll->active) {
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- assert_pch_pll_enabled(dev_priv, intel_crtc);
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+ assert_pch_pll_enabled(dev_priv, pll, NULL);
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return;
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}
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@@ -1495,7 +1503,9 @@ static void intel_enable_transcoder(struct drm_i915_private *dev_priv,
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BUG_ON(dev_priv->info->gen < 5);
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/* Make sure PCH DPLL is enabled */
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- assert_pch_pll_enabled(dev_priv, to_intel_crtc(crtc));
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+ assert_pch_pll_enabled(dev_priv,
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+ to_intel_crtc(crtc)->pch_pll,
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+ to_intel_crtc(crtc));
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/* FDI must be feeding us bits for PCH ports */
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assert_fdi_tx_enabled(dev_priv, pipe);
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