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@@ -18,12 +18,21 @@
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#define QLC_BC_MSG 0
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#define QLC_BC_CFREE 1
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+#define QLC_BC_FLR 2
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#define QLC_BC_HDR_SZ 16
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#define QLC_BC_PAYLOAD_SZ (1024 - QLC_BC_HDR_SZ)
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#define QLC_DEFAULT_RCV_DESCRIPTORS_SRIOV_VF 2048
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#define QLC_DEFAULT_JUMBO_RCV_DESCRIPTORS_SRIOV_VF 512
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+#define QLC_83XX_VF_RESET_FAIL_THRESH 8
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+#define QLC_BC_CMD_MAX_RETRY_CNT 5
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+
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+static void qlcnic_sriov_vf_free_mac_list(struct qlcnic_adapter *);
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+static int qlcnic_sriov_alloc_bc_mbx_args(struct qlcnic_cmd_args *, u32);
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+static void qlcnic_sriov_vf_poll_dev_state(struct work_struct *);
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+static void qlcnic_sriov_vf_cancel_fw_work(struct qlcnic_adapter *);
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+static void qlcnic_sriov_cleanup_transaction(struct qlcnic_bc_trans *);
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static int qlcnic_sriov_vf_mbx_op(struct qlcnic_adapter *,
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struct qlcnic_cmd_args *);
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@@ -57,12 +66,13 @@ static struct qlcnic_hardware_ops qlcnic_sriov_vf_hw_ops = {
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.config_promisc_mode = qlcnic_83xx_nic_set_promisc,
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.change_l2_filter = qlcnic_83xx_change_l2_filter,
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.get_board_info = qlcnic_83xx_get_port_info,
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+ .free_mac_list = qlcnic_sriov_vf_free_mac_list,
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};
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static struct qlcnic_nic_template qlcnic_sriov_vf_ops = {
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.config_bridged_mode = qlcnic_config_bridged_mode,
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.config_led = qlcnic_config_led,
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- .cancel_idc_work = qlcnic_83xx_idc_exit,
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+ .cancel_idc_work = qlcnic_sriov_vf_cancel_fw_work,
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.napi_add = qlcnic_83xx_napi_add,
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.napi_del = qlcnic_83xx_napi_del,
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.config_ipaddr = qlcnic_83xx_config_ipaddr,
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@@ -72,6 +82,8 @@ static struct qlcnic_nic_template qlcnic_sriov_vf_ops = {
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static const struct qlcnic_mailbox_metadata qlcnic_sriov_bc_mbx_tbl[] = {
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{QLCNIC_BC_CMD_CHANNEL_INIT, 2, 2},
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{QLCNIC_BC_CMD_CHANNEL_TERM, 2, 2},
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+ {QLCNIC_BC_CMD_GET_ACL, 3, 14},
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+ {QLCNIC_BC_CMD_CFG_GUEST_VLAN, 2, 2},
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};
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static inline bool qlcnic_sriov_bc_msg_check(u32 val)
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@@ -84,6 +96,11 @@ static inline bool qlcnic_sriov_channel_free_check(u32 val)
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return (val & (1 << QLC_BC_CFREE)) ? true : false;
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}
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+static inline bool qlcnic_sriov_flr_check(u32 val)
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+{
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+ return (val & (1 << QLC_BC_FLR)) ? true : false;
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+}
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+
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static inline u8 qlcnic_sriov_target_func_id(u32 val)
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{
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return (val >> 4) & 0xff;
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@@ -169,6 +186,7 @@ int qlcnic_sriov_init(struct qlcnic_adapter *adapter, int num_vfs)
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goto qlcnic_destroy_async_wq;
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}
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sriov->vf_info[i].vp = vp;
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+ vp->max_tx_bw = MAX_BW;
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random_ether_addr(vp->mac);
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dev_info(&adapter->pdev->dev,
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"MAC Address %pM is configured for VF %d\n",
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@@ -192,10 +210,33 @@ qlcnic_free_sriov:
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return err;
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}
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+void qlcnic_sriov_cleanup_list(struct qlcnic_trans_list *t_list)
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+{
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+ struct qlcnic_bc_trans *trans;
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+ struct qlcnic_cmd_args cmd;
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+ unsigned long flags;
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+
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+ spin_lock_irqsave(&t_list->lock, flags);
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+
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+ while (!list_empty(&t_list->wait_list)) {
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+ trans = list_first_entry(&t_list->wait_list,
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+ struct qlcnic_bc_trans, list);
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+ list_del(&trans->list);
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+ t_list->count--;
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+ cmd.req.arg = (u32 *)trans->req_pay;
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+ cmd.rsp.arg = (u32 *)trans->rsp_pay;
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+ qlcnic_free_mbx_args(&cmd);
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+ qlcnic_sriov_cleanup_transaction(trans);
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+ }
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+
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+ spin_unlock_irqrestore(&t_list->lock, flags);
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+}
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+
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void __qlcnic_sriov_cleanup(struct qlcnic_adapter *adapter)
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{
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struct qlcnic_sriov *sriov = adapter->ahw->sriov;
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struct qlcnic_back_channel *bc = &sriov->bc;
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+ struct qlcnic_vf_info *vf;
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int i;
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if (!qlcnic_sriov_enable_check(adapter))
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@@ -203,6 +244,14 @@ void __qlcnic_sriov_cleanup(struct qlcnic_adapter *adapter)
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qlcnic_sriov_cleanup_async_list(bc);
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destroy_workqueue(bc->bc_async_wq);
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+
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+ for (i = 0; i < sriov->num_vfs; i++) {
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+ vf = &sriov->vf_info[i];
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+ qlcnic_sriov_cleanup_list(&vf->rcv_pend);
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+ cancel_work_sync(&vf->trans_work);
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+ qlcnic_sriov_cleanup_list(&vf->rcv_act);
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+ }
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+
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destroy_workqueue(bc->bc_trans_wq);
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for (i = 0; i < sriov->num_vfs; i++)
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@@ -286,7 +335,7 @@ poll:
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/* Get the FW response data */
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fw_data = readl(QLCNIC_MBX_FW(ahw, 0));
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if (fw_data & QLCNIC_MBX_ASYNC_EVENT) {
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- qlcnic_83xx_process_aen(adapter);
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+ __qlcnic_83xx_process_aen(adapter);
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mbx_val = QLCRDX(ahw, QLCNIC_HOST_MBX_CTRL);
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if (mbx_val)
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goto poll;
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@@ -335,16 +384,156 @@ static void qlcnic_sriov_vf_cfg_buff_desc(struct qlcnic_adapter *adapter)
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adapter->max_rds_rings = MAX_RDS_RINGS;
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}
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+int qlcnic_sriov_get_vf_vport_info(struct qlcnic_adapter *adapter,
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+ struct qlcnic_info *npar_info, u16 vport_id)
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+{
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+ struct device *dev = &adapter->pdev->dev;
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+ struct qlcnic_cmd_args cmd;
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+ int err;
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+ u32 status;
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+
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+ err = qlcnic_alloc_mbx_args(&cmd, adapter, QLCNIC_CMD_GET_NIC_INFO);
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+ if (err)
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+ return err;
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+
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+ cmd.req.arg[1] = vport_id << 16 | 0x1;
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+ err = qlcnic_issue_cmd(adapter, &cmd);
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+ if (err) {
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+ dev_err(&adapter->pdev->dev,
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+ "Failed to get vport info, err=%d\n", err);
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+ qlcnic_free_mbx_args(&cmd);
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+ return err;
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+ }
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+
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+ status = cmd.rsp.arg[2] & 0xffff;
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+ if (status & BIT_0)
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+ npar_info->min_tx_bw = MSW(cmd.rsp.arg[2]);
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+ if (status & BIT_1)
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+ npar_info->max_tx_bw = LSW(cmd.rsp.arg[3]);
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+ if (status & BIT_2)
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+ npar_info->max_tx_ques = MSW(cmd.rsp.arg[3]);
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+ if (status & BIT_3)
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+ npar_info->max_tx_mac_filters = LSW(cmd.rsp.arg[4]);
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+ if (status & BIT_4)
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+ npar_info->max_rx_mcast_mac_filters = MSW(cmd.rsp.arg[4]);
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+ if (status & BIT_5)
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+ npar_info->max_rx_ucast_mac_filters = LSW(cmd.rsp.arg[5]);
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+ if (status & BIT_6)
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+ npar_info->max_rx_ip_addr = MSW(cmd.rsp.arg[5]);
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+ if (status & BIT_7)
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+ npar_info->max_rx_lro_flow = LSW(cmd.rsp.arg[6]);
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+ if (status & BIT_8)
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+ npar_info->max_rx_status_rings = MSW(cmd.rsp.arg[6]);
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+ if (status & BIT_9)
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+ npar_info->max_rx_buf_rings = LSW(cmd.rsp.arg[7]);
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+
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+ npar_info->max_rx_ques = MSW(cmd.rsp.arg[7]);
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+ npar_info->max_tx_vlan_keys = LSW(cmd.rsp.arg[8]);
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+ npar_info->max_local_ipv6_addrs = MSW(cmd.rsp.arg[8]);
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+ npar_info->max_remote_ipv6_addrs = LSW(cmd.rsp.arg[9]);
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+
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+ dev_info(dev, "\n\tmin_tx_bw: %d, max_tx_bw: %d max_tx_ques: %d,\n"
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+ "\tmax_tx_mac_filters: %d max_rx_mcast_mac_filters: %d,\n"
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+ "\tmax_rx_ucast_mac_filters: 0x%x, max_rx_ip_addr: %d,\n"
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+ "\tmax_rx_lro_flow: %d max_rx_status_rings: %d,\n"
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+ "\tmax_rx_buf_rings: %d, max_rx_ques: %d, max_tx_vlan_keys %d\n"
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+ "\tlocal_ipv6_addr: %d, remote_ipv6_addr: %d\n",
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+ npar_info->min_tx_bw, npar_info->max_tx_bw,
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+ npar_info->max_tx_ques, npar_info->max_tx_mac_filters,
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+ npar_info->max_rx_mcast_mac_filters,
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+ npar_info->max_rx_ucast_mac_filters, npar_info->max_rx_ip_addr,
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+ npar_info->max_rx_lro_flow, npar_info->max_rx_status_rings,
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+ npar_info->max_rx_buf_rings, npar_info->max_rx_ques,
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+ npar_info->max_tx_vlan_keys, npar_info->max_local_ipv6_addrs,
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+ npar_info->max_remote_ipv6_addrs);
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+
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+ qlcnic_free_mbx_args(&cmd);
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+ return err;
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+}
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+
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+static int qlcnic_sriov_set_pvid_mode(struct qlcnic_adapter *adapter,
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+ struct qlcnic_cmd_args *cmd)
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+{
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+ adapter->rx_pvid = (cmd->rsp.arg[1] >> 16) & 0xffff;
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+ adapter->flags &= ~QLCNIC_TAGGING_ENABLED;
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+ return 0;
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+}
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+
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+static int qlcnic_sriov_set_guest_vlan_mode(struct qlcnic_adapter *adapter,
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+ struct qlcnic_cmd_args *cmd)
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+{
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+ struct qlcnic_sriov *sriov = adapter->ahw->sriov;
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+ int i, num_vlans;
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+ u16 *vlans;
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+
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+ if (sriov->allowed_vlans)
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+ return 0;
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+
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+ sriov->any_vlan = cmd->rsp.arg[2] & 0xf;
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+ if (!sriov->any_vlan)
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+ return 0;
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+
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+ sriov->num_allowed_vlans = cmd->rsp.arg[2] >> 16;
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+ num_vlans = sriov->num_allowed_vlans;
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+ sriov->allowed_vlans = kzalloc(sizeof(u16) * num_vlans, GFP_KERNEL);
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+ if (!sriov->allowed_vlans)
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+ return -ENOMEM;
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+
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+ vlans = (u16 *)&cmd->rsp.arg[3];
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+ for (i = 0; i < num_vlans; i++)
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+ sriov->allowed_vlans[i] = vlans[i];
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+
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+ return 0;
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+}
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+
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+static int qlcnic_sriov_get_vf_acl(struct qlcnic_adapter *adapter)
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+{
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+ struct qlcnic_sriov *sriov = adapter->ahw->sriov;
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+ struct qlcnic_cmd_args cmd;
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+ int ret;
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+
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+ ret = qlcnic_sriov_alloc_bc_mbx_args(&cmd, QLCNIC_BC_CMD_GET_ACL);
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+ if (ret)
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+ return ret;
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+
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+ ret = qlcnic_issue_cmd(adapter, &cmd);
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+ if (ret) {
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+ dev_err(&adapter->pdev->dev, "Failed to get ACL, err=%d\n",
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+ ret);
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+ } else {
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+ sriov->vlan_mode = cmd.rsp.arg[1] & 0x3;
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+ switch (sriov->vlan_mode) {
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+ case QLC_GUEST_VLAN_MODE:
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+ ret = qlcnic_sriov_set_guest_vlan_mode(adapter, &cmd);
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+ break;
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+ case QLC_PVID_MODE:
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+ ret = qlcnic_sriov_set_pvid_mode(adapter, &cmd);
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+ break;
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+ }
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+ }
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+
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+ qlcnic_free_mbx_args(&cmd);
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+ return ret;
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+}
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+
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static int qlcnic_sriov_vf_init_driver(struct qlcnic_adapter *adapter)
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{
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struct qlcnic_info nic_info;
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struct qlcnic_hardware_context *ahw = adapter->ahw;
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int err;
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+ err = qlcnic_sriov_get_vf_vport_info(adapter, &nic_info, 0);
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+ if (err)
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+ return err;
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+
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err = qlcnic_get_nic_info(adapter, &nic_info, ahw->pci_func);
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if (err)
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return -EIO;
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+ err = qlcnic_sriov_get_vf_acl(adapter);
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+ if (err)
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+ return err;
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+
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if (qlcnic_83xx_get_port_info(adapter))
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return -EIO;
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@@ -404,6 +593,8 @@ static int qlcnic_sriov_setup_vf(struct qlcnic_adapter *adapter,
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pci_set_drvdata(adapter->pdev, adapter);
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dev_info(&adapter->pdev->dev, "%s: XGbE port initialized\n",
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adapter->netdev->name);
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+ qlcnic_schedule_work(adapter, qlcnic_sriov_vf_poll_dev_state,
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+ adapter->ahw->idc.delay);
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return 0;
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err_out_send_channel_term:
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@@ -423,27 +614,47 @@ err_out_disable_msi:
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return err;
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}
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+static int qlcnic_sriov_check_dev_ready(struct qlcnic_adapter *adapter)
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+{
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+ u32 state;
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+
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+ do {
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+ msleep(20);
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+ if (++adapter->fw_fail_cnt > QLC_BC_CMD_MAX_RETRY_CNT)
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+ return -EIO;
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+ state = QLCRDX(adapter->ahw, QLC_83XX_IDC_DEV_STATE);
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+ } while (state != QLC_83XX_IDC_DEV_READY);
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+
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+ return 0;
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+}
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+
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int qlcnic_sriov_vf_init(struct qlcnic_adapter *adapter, int pci_using_dac)
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{
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struct qlcnic_hardware_context *ahw = adapter->ahw;
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+ int err;
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spin_lock_init(&ahw->mbx_lock);
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- set_bit(QLC_83XX_MBX_READY, &adapter->ahw->idc.status);
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+ set_bit(QLC_83XX_MBX_READY, &ahw->idc.status);
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+ set_bit(QLC_83XX_MODULE_LOADED, &ahw->idc.status);
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+ ahw->idc.delay = QLC_83XX_IDC_FW_POLL_DELAY;
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+ ahw->reset_context = 0;
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+ adapter->fw_fail_cnt = 0;
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ahw->msix_supported = 1;
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+ adapter->need_fw_reset = 0;
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adapter->flags |= QLCNIC_TX_INTR_SHARED;
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- if (qlcnic_sriov_setup_vf(adapter, pci_using_dac))
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- return -EIO;
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+ err = qlcnic_sriov_check_dev_ready(adapter);
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+ if (err)
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+ return err;
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+
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+ err = qlcnic_sriov_setup_vf(adapter, pci_using_dac);
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+ if (err)
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+ return err;
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if (qlcnic_read_mac_addr(adapter))
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dev_warn(&adapter->pdev->dev, "failed to read mac addr\n");
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- set_bit(QLC_83XX_MODULE_LOADED, &adapter->ahw->idc.status);
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- adapter->ahw->idc.delay = QLC_83XX_IDC_FW_POLL_DELAY;
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- adapter->ahw->reset_context = 0;
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- adapter->fw_fail_cnt = 0;
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clear_bit(__QLCNIC_RESETTING, &adapter->state);
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- adapter->need_fw_reset = 0;
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return 0;
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}
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@@ -651,6 +862,10 @@ static void qlcnic_sriov_schedule_bc_cmd(struct qlcnic_sriov *sriov,
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struct qlcnic_vf_info *vf,
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work_func_t func)
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{
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+ if (test_bit(QLC_BC_VF_FLR, &vf->state) ||
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+ vf->adapter->need_fw_reset)
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+ return;
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+
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INIT_WORK(&vf->trans_work, func);
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queue_work(sriov->bc.bc_trans_wq, &vf->trans_work);
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}
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@@ -768,10 +983,14 @@ static int qlcnic_sriov_issue_bc_post(struct qlcnic_bc_trans *trans, u8 type)
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static int __qlcnic_sriov_send_bc_msg(struct qlcnic_bc_trans *trans,
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struct qlcnic_vf_info *vf, u8 type)
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{
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- int err;
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bool flag = true;
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+ int err = -EIO;
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while (flag) {
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+ if (test_bit(QLC_BC_VF_FLR, &vf->state) ||
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+ vf->adapter->need_fw_reset)
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+ trans->trans_state = QLC_ABORT;
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+
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switch (trans->trans_state) {
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case QLC_INIT:
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trans->trans_state = QLC_WAIT_FOR_CHANNEL_FREE;
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@@ -853,6 +1072,12 @@ static void qlcnic_sriov_process_bc_cmd(struct work_struct *work)
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struct qlcnic_cmd_args cmd;
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u8 req;
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+ if (adapter->need_fw_reset)
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+ return;
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+
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+ if (test_bit(QLC_BC_VF_FLR, &vf->state))
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+ return;
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+
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trans = list_first_entry(&vf->rcv_act.wait_list,
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struct qlcnic_bc_trans, list);
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adapter = vf->adapter;
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@@ -906,18 +1131,30 @@ clear_send:
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clear_bit(QLC_BC_VF_SEND, &vf->state);
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}
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-static int qlcnic_sriov_add_act_list(struct qlcnic_sriov *sriov,
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- struct qlcnic_vf_info *vf,
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- struct qlcnic_bc_trans *trans)
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+int __qlcnic_sriov_add_act_list(struct qlcnic_sriov *sriov,
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+ struct qlcnic_vf_info *vf,
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+ struct qlcnic_bc_trans *trans)
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{
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struct qlcnic_trans_list *t_list = &vf->rcv_act;
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- spin_lock(&t_list->lock);
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t_list->count++;
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list_add_tail(&trans->list, &t_list->wait_list);
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if (t_list->count == 1)
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qlcnic_sriov_schedule_bc_cmd(sriov, vf,
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qlcnic_sriov_process_bc_cmd);
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+ return 0;
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+}
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+
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+static int qlcnic_sriov_add_act_list(struct qlcnic_sriov *sriov,
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+ struct qlcnic_vf_info *vf,
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+ struct qlcnic_bc_trans *trans)
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+{
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+ struct qlcnic_trans_list *t_list = &vf->rcv_act;
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+
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+ spin_lock(&t_list->lock);
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+
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+ __qlcnic_sriov_add_act_list(sriov, vf, trans);
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+
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spin_unlock(&t_list->lock);
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return 0;
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}
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@@ -977,6 +1214,9 @@ static void qlcnic_sriov_handle_bc_cmd(struct qlcnic_sriov *sriov,
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int err;
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u8 cmd_op;
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+ if (adapter->need_fw_reset)
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+ return;
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+
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if (!test_bit(QLC_BC_VF_STATE, &vf->state) &&
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hdr->op_type != QLC_BC_CMD &&
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hdr->cmd_op != QLCNIC_BC_CMD_CHANNEL_INIT)
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@@ -1019,6 +1259,10 @@ static void qlcnic_sriov_handle_bc_cmd(struct qlcnic_sriov *sriov,
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trans->vf = vf;
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trans->trans_id = hdr->seq_id;
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trans->curr_req_frag++;
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+
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+ if (qlcnic_sriov_soft_flr_check(adapter, trans, vf))
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+ return;
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+
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if (trans->curr_req_frag == trans->req_hdr->num_frags) {
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if (qlcnic_sriov_add_act_list(sriov, vf, trans)) {
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qlcnic_free_mbx_args(&cmd);
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@@ -1053,6 +1297,18 @@ static void qlcnic_sriov_handle_msg_event(struct qlcnic_sriov *sriov,
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}
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}
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+static void qlcnic_sriov_handle_flr_event(struct qlcnic_sriov *sriov,
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+ struct qlcnic_vf_info *vf)
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+{
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+ struct qlcnic_adapter *adapter = vf->adapter;
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+
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+ if (qlcnic_sriov_pf_check(adapter))
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+ qlcnic_sriov_pf_handle_flr(sriov, vf);
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+ else
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+ dev_err(&adapter->pdev->dev,
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+ "Invalid event to VF. VF should not get FLR event\n");
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+}
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+
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void qlcnic_sriov_handle_bc_event(struct qlcnic_adapter *adapter, u32 event)
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|
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{
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|
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struct qlcnic_vf_info *vf;
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@@ -1073,6 +1329,11 @@ void qlcnic_sriov_handle_bc_event(struct qlcnic_adapter *adapter, u32 event)
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if (qlcnic_sriov_channel_free_check(event))
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complete(&vf->ch_free_cmpl);
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+ if (qlcnic_sriov_flr_check(event)) {
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+ qlcnic_sriov_handle_flr_event(sriov, vf);
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+ return;
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+ }
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+
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|
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if (qlcnic_sriov_bc_msg_check(event))
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qlcnic_sriov_handle_msg_event(sriov, vf);
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}
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@@ -1103,33 +1364,66 @@ int qlcnic_sriov_cfg_bc_intr(struct qlcnic_adapter *adapter, u8 enable)
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return err;
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}
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+static int qlcnic_sriov_retry_bc_cmd(struct qlcnic_adapter *adapter,
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+ struct qlcnic_bc_trans *trans)
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|
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+{
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+ u8 max = QLC_BC_CMD_MAX_RETRY_CNT;
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+ u32 state;
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+
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+ state = QLCRDX(adapter->ahw, QLC_83XX_IDC_DEV_STATE);
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+ if (state == QLC_83XX_IDC_DEV_READY) {
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|
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+ msleep(20);
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+ clear_bit(QLC_BC_VF_CHANNEL, &trans->vf->state);
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+ trans->trans_state = QLC_INIT;
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+ if (++adapter->fw_fail_cnt > max)
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+ return -EIO;
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+ else
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+ return 0;
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+ }
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+
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|
+ return -EIO;
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|
+}
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+
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|
|
static int qlcnic_sriov_vf_mbx_op(struct qlcnic_adapter *adapter,
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|
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struct qlcnic_cmd_args *cmd)
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|
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{
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|
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+ struct qlcnic_hardware_context *ahw = adapter->ahw;
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+ struct device *dev = &adapter->pdev->dev;
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struct qlcnic_bc_trans *trans;
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|
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int err;
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|
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u32 rsp_data, opcode, mbx_err_code, rsp;
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u16 seq = ++adapter->ahw->sriov->bc.trans_counter;
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+ u8 func = ahw->pci_func;
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- if (qlcnic_sriov_alloc_bc_trans(&trans))
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- return -ENOMEM;
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+ rsp = qlcnic_sriov_alloc_bc_trans(&trans);
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+ if (rsp)
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+ return rsp;
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- if (qlcnic_sriov_prepare_bc_hdr(trans, cmd, seq, QLC_BC_COMMAND))
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- return -ENOMEM;
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+ rsp = qlcnic_sriov_prepare_bc_hdr(trans, cmd, seq, QLC_BC_COMMAND);
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+ if (rsp)
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+ goto cleanup_transaction;
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+retry:
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if (!test_bit(QLC_83XX_MBX_READY, &adapter->ahw->idc.status)) {
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rsp = -EIO;
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QLCDB(adapter, DRV, "MBX not Ready!(cmd 0x%x) for VF 0x%x\n",
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- QLCNIC_MBX_RSP(cmd->req.arg[0]), adapter->ahw->pci_func);
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+ QLCNIC_MBX_RSP(cmd->req.arg[0]), func);
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|
goto err_out;
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}
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- err = qlcnic_sriov_send_bc_cmd(adapter, trans, adapter->ahw->pci_func);
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+ err = qlcnic_sriov_send_bc_cmd(adapter, trans, func);
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if (err) {
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- dev_err(&adapter->pdev->dev,
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- "MBX command 0x%x timed out for VF %d\n",
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- (cmd->req.arg[0] & 0xffff), adapter->ahw->pci_func);
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+ dev_err(dev, "MBX command 0x%x timed out for VF %d\n",
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+ (cmd->req.arg[0] & 0xffff), func);
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rsp = QLCNIC_RCODE_TIMEOUT;
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+
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+ /* After adapter reset PF driver may take some time to
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|
+ * respond to VF's request. Retry request till maximum retries.
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|
+ */
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|
+ if ((trans->req_hdr->cmd_op == QLCNIC_BC_CMD_CHANNEL_INIT) &&
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|
|
+ !qlcnic_sriov_retry_bc_cmd(adapter, trans))
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|
+ goto retry;
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|
+
|
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|
goto err_out;
|
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|
}
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|
|
@@ -1144,12 +1438,19 @@ static int qlcnic_sriov_vf_mbx_op(struct qlcnic_adapter *adapter,
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|
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rsp = mbx_err_code;
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if (!rsp)
|
|
|
rsp = 1;
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|
|
- dev_err(&adapter->pdev->dev,
|
|
|
+ dev_err(dev,
|
|
|
"MBX command 0x%x failed with err:0x%x for VF %d\n",
|
|
|
- opcode, mbx_err_code, adapter->ahw->pci_func);
|
|
|
+ opcode, mbx_err_code, func);
|
|
|
}
|
|
|
|
|
|
err_out:
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|
|
+ if (rsp == QLCNIC_RCODE_TIMEOUT) {
|
|
|
+ ahw->reset_context = 1;
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|
|
+ adapter->need_fw_reset = 1;
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|
|
+ clear_bit(QLC_83XX_MBX_READY, &ahw->idc.status);
|
|
|
+ }
|
|
|
+
|
|
|
+cleanup_transaction:
|
|
|
qlcnic_sriov_cleanup_transaction(trans);
|
|
|
return rsp;
|
|
|
}
|
|
|
@@ -1184,7 +1485,7 @@ out:
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|
|
return ret;
|
|
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}
|
|
|
|
|
|
-void qlcnic_vf_add_mc_list(struct net_device *netdev)
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|
|
+void qlcnic_vf_add_mc_list(struct net_device *netdev, u16 vlan)
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|
|
{
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|
|
struct qlcnic_adapter *adapter = netdev_priv(netdev);
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|
|
struct qlcnic_mac_list_s *cur;
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|
@@ -1204,7 +1505,7 @@ void qlcnic_vf_add_mc_list(struct net_device *netdev)
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|
while (!list_empty(&tmp_list)) {
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|
|
cur = list_entry((&tmp_list)->next,
|
|
|
struct qlcnic_mac_list_s, list);
|
|
|
- qlcnic_nic_add_mac(adapter, cur->mac_addr);
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|
|
+ qlcnic_nic_add_mac(adapter, cur->mac_addr, vlan);
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|
|
list_del(&cur->list);
|
|
|
kfree(cur);
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|
|
}
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|
@@ -1227,11 +1528,13 @@ void qlcnic_sriov_cleanup_async_list(struct qlcnic_back_channel *bc)
|
|
|
static void qlcnic_sriov_vf_set_multi(struct net_device *netdev)
|
|
|
{
|
|
|
struct qlcnic_adapter *adapter = netdev_priv(netdev);
|
|
|
+ u16 vlan;
|
|
|
|
|
|
if (!test_bit(__QLCNIC_FW_ATTACHED, &adapter->state))
|
|
|
return;
|
|
|
|
|
|
- __qlcnic_set_multi(netdev);
|
|
|
+ vlan = adapter->ahw->sriov->vlan;
|
|
|
+ __qlcnic_set_multi(netdev, vlan);
|
|
|
}
|
|
|
|
|
|
static void qlcnic_sriov_handle_async_multi(struct work_struct *work)
|
|
|
@@ -1292,6 +1595,360 @@ void qlcnic_sriov_vf_schedule_multi(struct net_device *netdev)
|
|
|
struct qlcnic_adapter *adapter = netdev_priv(netdev);
|
|
|
struct qlcnic_back_channel *bc = &adapter->ahw->sriov->bc;
|
|
|
|
|
|
+ if (adapter->need_fw_reset)
|
|
|
+ return;
|
|
|
+
|
|
|
qlcnic_sriov_schedule_bc_async_work(bc, qlcnic_sriov_handle_async_multi,
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|
|
netdev);
|
|
|
}
|
|
|
+
|
|
|
+static int qlcnic_sriov_vf_reinit_driver(struct qlcnic_adapter *adapter)
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|
|
+{
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|
|
+ int err;
|
|
|
+
|
|
|
+ set_bit(QLC_83XX_MBX_READY, &adapter->ahw->idc.status);
|
|
|
+ qlcnic_83xx_enable_mbx_intrpt(adapter);
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|
+
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|
|
+ err = qlcnic_sriov_cfg_bc_intr(adapter, 1);
|
|
|
+ if (err)
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|
|
+ return err;
|
|
|
+
|
|
|
+ err = qlcnic_sriov_channel_cfg_cmd(adapter, QLCNIC_BC_CMD_CHANNEL_INIT);
|
|
|
+ if (err)
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|
|
+ goto err_out_cleanup_bc_intr;
|
|
|
+
|
|
|
+ err = qlcnic_sriov_vf_init_driver(adapter);
|
|
|
+ if (err)
|
|
|
+ goto err_out_term_channel;
|
|
|
+
|
|
|
+ return 0;
|
|
|
+
|
|
|
+err_out_term_channel:
|
|
|
+ qlcnic_sriov_channel_cfg_cmd(adapter, QLCNIC_BC_CMD_CHANNEL_TERM);
|
|
|
+
|
|
|
+err_out_cleanup_bc_intr:
|
|
|
+ qlcnic_sriov_cfg_bc_intr(adapter, 0);
|
|
|
+ return err;
|
|
|
+}
|
|
|
+
|
|
|
+static void qlcnic_sriov_vf_attach(struct qlcnic_adapter *adapter)
|
|
|
+{
|
|
|
+ struct net_device *netdev = adapter->netdev;
|
|
|
+
|
|
|
+ if (netif_running(netdev)) {
|
|
|
+ if (!qlcnic_up(adapter, netdev))
|
|
|
+ qlcnic_restore_indev_addr(netdev, NETDEV_UP);
|
|
|
+ }
|
|
|
+
|
|
|
+ netif_device_attach(netdev);
|
|
|
+}
|
|
|
+
|
|
|
+static void qlcnic_sriov_vf_detach(struct qlcnic_adapter *adapter)
|
|
|
+{
|
|
|
+ struct qlcnic_hardware_context *ahw = adapter->ahw;
|
|
|
+ struct qlcnic_intrpt_config *intr_tbl = ahw->intr_tbl;
|
|
|
+ struct net_device *netdev = adapter->netdev;
|
|
|
+ u8 i, max_ints = ahw->num_msix - 1;
|
|
|
+
|
|
|
+ qlcnic_83xx_disable_mbx_intr(adapter);
|
|
|
+ netif_device_detach(netdev);
|
|
|
+ if (netif_running(netdev))
|
|
|
+ qlcnic_down(adapter, netdev);
|
|
|
+
|
|
|
+ for (i = 0; i < max_ints; i++) {
|
|
|
+ intr_tbl[i].id = i;
|
|
|
+ intr_tbl[i].enabled = 0;
|
|
|
+ intr_tbl[i].src = 0;
|
|
|
+ }
|
|
|
+ ahw->reset_context = 0;
|
|
|
+}
|
|
|
+
|
|
|
+static int qlcnic_sriov_vf_handle_dev_ready(struct qlcnic_adapter *adapter)
|
|
|
+{
|
|
|
+ struct qlcnic_hardware_context *ahw = adapter->ahw;
|
|
|
+ struct device *dev = &adapter->pdev->dev;
|
|
|
+ struct qlc_83xx_idc *idc = &ahw->idc;
|
|
|
+ u8 func = ahw->pci_func;
|
|
|
+ u32 state;
|
|
|
+
|
|
|
+ if ((idc->prev_state == QLC_83XX_IDC_DEV_NEED_RESET) ||
|
|
|
+ (idc->prev_state == QLC_83XX_IDC_DEV_INIT)) {
|
|
|
+ if (!qlcnic_sriov_vf_reinit_driver(adapter)) {
|
|
|
+ qlcnic_sriov_vf_attach(adapter);
|
|
|
+ adapter->fw_fail_cnt = 0;
|
|
|
+ dev_info(dev,
|
|
|
+ "%s: Reinitalization of VF 0x%x done after FW reset\n",
|
|
|
+ __func__, func);
|
|
|
+ } else {
|
|
|
+ dev_err(dev,
|
|
|
+ "%s: Reinitialization of VF 0x%x failed after FW reset\n",
|
|
|
+ __func__, func);
|
|
|
+ state = QLCRDX(ahw, QLC_83XX_IDC_DEV_STATE);
|
|
|
+ dev_info(dev, "Current state 0x%x after FW reset\n",
|
|
|
+ state);
|
|
|
+ }
|
|
|
+ }
|
|
|
+
|
|
|
+ return 0;
|
|
|
+}
|
|
|
+
|
|
|
+static int qlcnic_sriov_vf_handle_context_reset(struct qlcnic_adapter *adapter)
|
|
|
+{
|
|
|
+ struct qlcnic_hardware_context *ahw = adapter->ahw;
|
|
|
+ struct device *dev = &adapter->pdev->dev;
|
|
|
+ struct qlc_83xx_idc *idc = &ahw->idc;
|
|
|
+ u8 func = ahw->pci_func;
|
|
|
+ u32 state;
|
|
|
+
|
|
|
+ adapter->reset_ctx_cnt++;
|
|
|
+
|
|
|
+ /* Skip the context reset and check if FW is hung */
|
|
|
+ if (adapter->reset_ctx_cnt < 3) {
|
|
|
+ adapter->need_fw_reset = 1;
|
|
|
+ clear_bit(QLC_83XX_MBX_READY, &idc->status);
|
|
|
+ dev_info(dev,
|
|
|
+ "Resetting context, wait here to check if FW is in failed state\n");
|
|
|
+ return 0;
|
|
|
+ }
|
|
|
+
|
|
|
+ /* Check if number of resets exceed the threshold.
|
|
|
+ * If it exceeds the threshold just fail the VF.
|
|
|
+ */
|
|
|
+ if (adapter->reset_ctx_cnt > QLC_83XX_VF_RESET_FAIL_THRESH) {
|
|
|
+ clear_bit(QLC_83XX_MODULE_LOADED, &idc->status);
|
|
|
+ adapter->tx_timeo_cnt = 0;
|
|
|
+ adapter->fw_fail_cnt = 0;
|
|
|
+ adapter->reset_ctx_cnt = 0;
|
|
|
+ qlcnic_sriov_vf_detach(adapter);
|
|
|
+ dev_err(dev,
|
|
|
+ "Device context resets have exceeded the threshold, device interface will be shutdown\n");
|
|
|
+ return -EIO;
|
|
|
+ }
|
|
|
+
|
|
|
+ dev_info(dev, "Resetting context of VF 0x%x\n", func);
|
|
|
+ dev_info(dev, "%s: Context reset count %d for VF 0x%x\n",
|
|
|
+ __func__, adapter->reset_ctx_cnt, func);
|
|
|
+ set_bit(__QLCNIC_RESETTING, &adapter->state);
|
|
|
+ adapter->need_fw_reset = 1;
|
|
|
+ clear_bit(QLC_83XX_MBX_READY, &idc->status);
|
|
|
+ qlcnic_sriov_vf_detach(adapter);
|
|
|
+ adapter->need_fw_reset = 0;
|
|
|
+
|
|
|
+ if (!qlcnic_sriov_vf_reinit_driver(adapter)) {
|
|
|
+ qlcnic_sriov_vf_attach(adapter);
|
|
|
+ adapter->netdev->trans_start = jiffies;
|
|
|
+ adapter->tx_timeo_cnt = 0;
|
|
|
+ adapter->reset_ctx_cnt = 0;
|
|
|
+ adapter->fw_fail_cnt = 0;
|
|
|
+ dev_info(dev, "Done resetting context for VF 0x%x\n", func);
|
|
|
+ } else {
|
|
|
+ dev_err(dev, "%s: Reinitialization of VF 0x%x failed\n",
|
|
|
+ __func__, func);
|
|
|
+ state = QLCRDX(ahw, QLC_83XX_IDC_DEV_STATE);
|
|
|
+ dev_info(dev, "%s: Current state 0x%x\n", __func__, state);
|
|
|
+ }
|
|
|
+
|
|
|
+ return 0;
|
|
|
+}
|
|
|
+
|
|
|
+static int qlcnic_sriov_vf_idc_ready_state(struct qlcnic_adapter *adapter)
|
|
|
+{
|
|
|
+ struct qlcnic_hardware_context *ahw = adapter->ahw;
|
|
|
+ int ret = 0;
|
|
|
+
|
|
|
+ if (ahw->idc.prev_state != QLC_83XX_IDC_DEV_READY)
|
|
|
+ ret = qlcnic_sriov_vf_handle_dev_ready(adapter);
|
|
|
+ else if (ahw->reset_context)
|
|
|
+ ret = qlcnic_sriov_vf_handle_context_reset(adapter);
|
|
|
+
|
|
|
+ clear_bit(__QLCNIC_RESETTING, &adapter->state);
|
|
|
+ return ret;
|
|
|
+}
|
|
|
+
|
|
|
+static int qlcnic_sriov_vf_idc_failed_state(struct qlcnic_adapter *adapter)
|
|
|
+{
|
|
|
+ struct qlc_83xx_idc *idc = &adapter->ahw->idc;
|
|
|
+
|
|
|
+ dev_err(&adapter->pdev->dev, "Device is in failed state\n");
|
|
|
+ if (idc->prev_state == QLC_83XX_IDC_DEV_READY)
|
|
|
+ qlcnic_sriov_vf_detach(adapter);
|
|
|
+
|
|
|
+ clear_bit(QLC_83XX_MODULE_LOADED, &idc->status);
|
|
|
+ clear_bit(__QLCNIC_RESETTING, &adapter->state);
|
|
|
+ return -EIO;
|
|
|
+}
|
|
|
+
|
|
|
+static int
|
|
|
+qlcnic_sriov_vf_idc_need_quiescent_state(struct qlcnic_adapter *adapter)
|
|
|
+{
|
|
|
+ struct qlc_83xx_idc *idc = &adapter->ahw->idc;
|
|
|
+
|
|
|
+ dev_info(&adapter->pdev->dev, "Device is in quiescent state\n");
|
|
|
+ if (idc->prev_state == QLC_83XX_IDC_DEV_READY) {
|
|
|
+ set_bit(__QLCNIC_RESETTING, &adapter->state);
|
|
|
+ adapter->tx_timeo_cnt = 0;
|
|
|
+ adapter->reset_ctx_cnt = 0;
|
|
|
+ clear_bit(QLC_83XX_MBX_READY, &idc->status);
|
|
|
+ qlcnic_sriov_vf_detach(adapter);
|
|
|
+ }
|
|
|
+
|
|
|
+ return 0;
|
|
|
+}
|
|
|
+
|
|
|
+static int qlcnic_sriov_vf_idc_init_reset_state(struct qlcnic_adapter *adapter)
|
|
|
+{
|
|
|
+ struct qlc_83xx_idc *idc = &adapter->ahw->idc;
|
|
|
+ u8 func = adapter->ahw->pci_func;
|
|
|
+
|
|
|
+ if (idc->prev_state == QLC_83XX_IDC_DEV_READY) {
|
|
|
+ dev_err(&adapter->pdev->dev,
|
|
|
+ "Firmware hang detected by VF 0x%x\n", func);
|
|
|
+ set_bit(__QLCNIC_RESETTING, &adapter->state);
|
|
|
+ adapter->tx_timeo_cnt = 0;
|
|
|
+ adapter->reset_ctx_cnt = 0;
|
|
|
+ clear_bit(QLC_83XX_MBX_READY, &idc->status);
|
|
|
+ qlcnic_sriov_vf_detach(adapter);
|
|
|
+ }
|
|
|
+ return 0;
|
|
|
+}
|
|
|
+
|
|
|
+static int qlcnic_sriov_vf_idc_unknown_state(struct qlcnic_adapter *adapter)
|
|
|
+{
|
|
|
+ dev_err(&adapter->pdev->dev, "%s: Device in unknown state\n", __func__);
|
|
|
+ return 0;
|
|
|
+}
|
|
|
+
|
|
|
+static void qlcnic_sriov_vf_poll_dev_state(struct work_struct *work)
|
|
|
+{
|
|
|
+ struct qlcnic_adapter *adapter;
|
|
|
+ struct qlc_83xx_idc *idc;
|
|
|
+ int ret = 0;
|
|
|
+
|
|
|
+ adapter = container_of(work, struct qlcnic_adapter, fw_work.work);
|
|
|
+ idc = &adapter->ahw->idc;
|
|
|
+ idc->curr_state = QLCRDX(adapter->ahw, QLC_83XX_IDC_DEV_STATE);
|
|
|
+
|
|
|
+ switch (idc->curr_state) {
|
|
|
+ case QLC_83XX_IDC_DEV_READY:
|
|
|
+ ret = qlcnic_sriov_vf_idc_ready_state(adapter);
|
|
|
+ break;
|
|
|
+ case QLC_83XX_IDC_DEV_NEED_RESET:
|
|
|
+ case QLC_83XX_IDC_DEV_INIT:
|
|
|
+ ret = qlcnic_sriov_vf_idc_init_reset_state(adapter);
|
|
|
+ break;
|
|
|
+ case QLC_83XX_IDC_DEV_NEED_QUISCENT:
|
|
|
+ ret = qlcnic_sriov_vf_idc_need_quiescent_state(adapter);
|
|
|
+ break;
|
|
|
+ case QLC_83XX_IDC_DEV_FAILED:
|
|
|
+ ret = qlcnic_sriov_vf_idc_failed_state(adapter);
|
|
|
+ break;
|
|
|
+ case QLC_83XX_IDC_DEV_QUISCENT:
|
|
|
+ break;
|
|
|
+ default:
|
|
|
+ ret = qlcnic_sriov_vf_idc_unknown_state(adapter);
|
|
|
+ }
|
|
|
+
|
|
|
+ idc->prev_state = idc->curr_state;
|
|
|
+ if (!ret && test_bit(QLC_83XX_MODULE_LOADED, &idc->status))
|
|
|
+ qlcnic_schedule_work(adapter, qlcnic_sriov_vf_poll_dev_state,
|
|
|
+ idc->delay);
|
|
|
+}
|
|
|
+
|
|
|
+static void qlcnic_sriov_vf_cancel_fw_work(struct qlcnic_adapter *adapter)
|
|
|
+{
|
|
|
+ while (test_and_set_bit(__QLCNIC_RESETTING, &adapter->state))
|
|
|
+ msleep(20);
|
|
|
+
|
|
|
+ clear_bit(QLC_83XX_MODULE_LOADED, &adapter->ahw->idc.status);
|
|
|
+ clear_bit(__QLCNIC_RESETTING, &adapter->state);
|
|
|
+ cancel_delayed_work_sync(&adapter->fw_work);
|
|
|
+}
|
|
|
+
|
|
|
+static int qlcnic_sriov_validate_vlan_cfg(struct qlcnic_sriov *sriov,
|
|
|
+ u16 vid, u8 enable)
|
|
|
+{
|
|
|
+ u16 vlan = sriov->vlan;
|
|
|
+ u8 allowed = 0;
|
|
|
+ int i;
|
|
|
+
|
|
|
+ if (sriov->vlan_mode != QLC_GUEST_VLAN_MODE)
|
|
|
+ return -EINVAL;
|
|
|
+
|
|
|
+ if (enable) {
|
|
|
+ if (vlan)
|
|
|
+ return -EINVAL;
|
|
|
+
|
|
|
+ if (sriov->any_vlan) {
|
|
|
+ for (i = 0; i < sriov->num_allowed_vlans; i++) {
|
|
|
+ if (sriov->allowed_vlans[i] == vid)
|
|
|
+ allowed = 1;
|
|
|
+ }
|
|
|
+
|
|
|
+ if (!allowed)
|
|
|
+ return -EINVAL;
|
|
|
+ }
|
|
|
+ } else {
|
|
|
+ if (!vlan || vlan != vid)
|
|
|
+ return -EINVAL;
|
|
|
+ }
|
|
|
+
|
|
|
+ return 0;
|
|
|
+}
|
|
|
+
|
|
|
+int qlcnic_sriov_cfg_vf_guest_vlan(struct qlcnic_adapter *adapter,
|
|
|
+ u16 vid, u8 enable)
|
|
|
+{
|
|
|
+ struct qlcnic_sriov *sriov = adapter->ahw->sriov;
|
|
|
+ struct qlcnic_cmd_args cmd;
|
|
|
+ int ret;
|
|
|
+
|
|
|
+ if (vid == 0)
|
|
|
+ return 0;
|
|
|
+
|
|
|
+ ret = qlcnic_sriov_validate_vlan_cfg(sriov, vid, enable);
|
|
|
+ if (ret)
|
|
|
+ return ret;
|
|
|
+
|
|
|
+ ret = qlcnic_sriov_alloc_bc_mbx_args(&cmd,
|
|
|
+ QLCNIC_BC_CMD_CFG_GUEST_VLAN);
|
|
|
+ if (ret)
|
|
|
+ return ret;
|
|
|
+
|
|
|
+ cmd.req.arg[1] = (enable & 1) | vid << 16;
|
|
|
+
|
|
|
+ qlcnic_sriov_cleanup_async_list(&sriov->bc);
|
|
|
+ ret = qlcnic_issue_cmd(adapter, &cmd);
|
|
|
+ if (ret) {
|
|
|
+ dev_err(&adapter->pdev->dev,
|
|
|
+ "Failed to configure guest VLAN, err=%d\n", ret);
|
|
|
+ } else {
|
|
|
+ qlcnic_free_mac_list(adapter);
|
|
|
+
|
|
|
+ if (enable)
|
|
|
+ sriov->vlan = vid;
|
|
|
+ else
|
|
|
+ sriov->vlan = 0;
|
|
|
+
|
|
|
+ qlcnic_sriov_vf_set_multi(adapter->netdev);
|
|
|
+ }
|
|
|
+
|
|
|
+ qlcnic_free_mbx_args(&cmd);
|
|
|
+ return ret;
|
|
|
+}
|
|
|
+
|
|
|
+static void qlcnic_sriov_vf_free_mac_list(struct qlcnic_adapter *adapter)
|
|
|
+{
|
|
|
+ struct list_head *head = &adapter->mac_list;
|
|
|
+ struct qlcnic_mac_list_s *cur;
|
|
|
+ u16 vlan;
|
|
|
+
|
|
|
+ vlan = adapter->ahw->sriov->vlan;
|
|
|
+
|
|
|
+ while (!list_empty(head)) {
|
|
|
+ cur = list_entry(head->next, struct qlcnic_mac_list_s, list);
|
|
|
+ qlcnic_sre_macaddr_change(adapter, cur->mac_addr,
|
|
|
+ vlan, QLCNIC_MAC_DEL);
|
|
|
+ list_del(&cur->list);
|
|
|
+ kfree(cur);
|
|
|
+ }
|
|
|
+}
|
David S. Miller