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@@ -19,6 +19,7 @@
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#include <linux/kernel.h>
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#include <linux/platform_device.h>
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#include <linux/io.h>
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+#include <linux/irq.h>
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#include <asm/mach-types.h>
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#include <asm/mach/arch.h>
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@@ -41,9 +42,28 @@ static void __init msm8x60_map_io(void)
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static void __init msm8x60_init_irq(void)
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{
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+ unsigned int i;
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+
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gic_dist_init(0, MSM_QGIC_DIST_BASE, 1);
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gic_cpu_base_addr = (void *)MSM_QGIC_CPU_BASE;
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gic_cpu_init(0, MSM_QGIC_CPU_BASE);
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+
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+ /* Edge trigger PPIs except AVS_SVICINT and AVS_SVICINTSWDONE */
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+ writel(0xFFFFD7FF, MSM_QGIC_DIST_BASE + GIC_DIST_CONFIG + 4);
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+
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+ /* RUMI does not adhere to GIC spec by enabling STIs by default.
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+ * Enable/clear is supposed to be RO for STIs, but is RW on RUMI.
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+ */
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+ writel(0x0000FFFF, MSM_QGIC_DIST_BASE + GIC_DIST_ENABLE_SET);
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+
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+ /* FIXME: Not installing AVS_SVICINT and AVS_SVICINTSWDONE yet
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+ * as they are configured as level, which does not play nice with
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+ * handle_percpu_irq.
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+ */
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+ for (i = GIC_PPI_START; i < GIC_SPI_START; i++) {
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+ if (i != AVS_SVICINT && i != AVS_SVICINTSWDONE)
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+ set_irq_handler(i, handle_percpu_irq);
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+ }
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}
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static void __init msm8x60_init(void)
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