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@@ -565,7 +565,7 @@ u32 omap2_clksel_to_divisor(struct clk *clk, u32 field_val)
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*
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* Given a struct clk of a rate-selectable clksel clock, and a clock divisor,
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* find the corresponding register field value. The return register value is
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- * the value before left-shifting. Returns 0xffffffff on error
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+ * the value before left-shifting. Returns ~0 on error
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*/
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u32 omap2_divisor_to_clksel(struct clk *clk, u32 div)
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{
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@@ -577,7 +577,7 @@ u32 omap2_divisor_to_clksel(struct clk *clk, u32 div)
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clks = omap2_get_clksel_by_parent(clk, clk->parent);
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if (clks == NULL)
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- return 0;
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+ return ~0;
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for (clkr = clks->rates; clkr->div; clkr++) {
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if ((clkr->flags & cpu_mask) && (clkr->div == div))
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@@ -588,7 +588,7 @@ u32 omap2_divisor_to_clksel(struct clk *clk, u32 div)
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printk(KERN_ERR "clock: Could not find divisor %d for "
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"clock %s parent %s\n", div, clk->name,
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clk->parent->name);
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- return 0;
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+ return ~0;
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}
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return clkr->val;
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