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@@ -83,7 +83,8 @@ enum {
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MTHCA_EVENT_TYPE_PATH_MIG = 0x01,
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MTHCA_EVENT_TYPE_COMM_EST = 0x02,
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MTHCA_EVENT_TYPE_SQ_DRAINED = 0x03,
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- MTHCA_EVENT_TYPE_SRQ_LAST_WQE = 0x13,
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+ MTHCA_EVENT_TYPE_SRQ_QP_LAST_WQE = 0x13,
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+ MTHCA_EVENT_TYPE_SRQ_LIMIT = 0x14,
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MTHCA_EVENT_TYPE_CQ_ERROR = 0x04,
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MTHCA_EVENT_TYPE_WQ_CATAS_ERROR = 0x05,
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MTHCA_EVENT_TYPE_EEC_CATAS_ERROR = 0x06,
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@@ -110,8 +111,9 @@ enum {
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(1ULL << MTHCA_EVENT_TYPE_LOCAL_CATAS_ERROR) | \
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(1ULL << MTHCA_EVENT_TYPE_PORT_CHANGE) | \
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(1ULL << MTHCA_EVENT_TYPE_ECC_DETECT))
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-#define MTHCA_SRQ_EVENT_MASK (1ULL << MTHCA_EVENT_TYPE_SRQ_CATAS_ERROR) | \
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- (1ULL << MTHCA_EVENT_TYPE_SRQ_LAST_WQE)
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+#define MTHCA_SRQ_EVENT_MASK ((1ULL << MTHCA_EVENT_TYPE_SRQ_CATAS_ERROR) | \
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+ (1ULL << MTHCA_EVENT_TYPE_SRQ_QP_LAST_WQE) | \
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+ (1ULL << MTHCA_EVENT_TYPE_SRQ_LIMIT))
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#define MTHCA_CMD_EVENT_MASK (1ULL << MTHCA_EVENT_TYPE_CMD)
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#define MTHCA_EQ_DB_INC_CI (1 << 24)
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@@ -141,6 +143,9 @@ struct mthca_eqe {
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struct {
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__be32 qpn;
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} __attribute__((packed)) qp;
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+ struct {
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+ __be32 srqn;
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+ } __attribute__((packed)) srq;
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struct {
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__be32 cqn;
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u32 reserved1;
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@@ -305,6 +310,16 @@ static int mthca_eq_int(struct mthca_dev *dev, struct mthca_eq *eq)
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IB_EVENT_SQ_DRAINED);
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break;
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+ case MTHCA_EVENT_TYPE_SRQ_QP_LAST_WQE:
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+ mthca_qp_event(dev, be32_to_cpu(eqe->event.qp.qpn) & 0xffffff,
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+ IB_EVENT_QP_LAST_WQE_REACHED);
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+ break;
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+
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+ case MTHCA_EVENT_TYPE_SRQ_LIMIT:
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+ mthca_srq_event(dev, be32_to_cpu(eqe->event.srq.srqn) & 0xffffff,
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+ IB_EVENT_SRQ_LIMIT_REACHED);
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+ break;
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+
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case MTHCA_EVENT_TYPE_WQ_CATAS_ERROR:
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mthca_qp_event(dev, be32_to_cpu(eqe->event.qp.qpn) & 0xffffff,
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IB_EVENT_QP_FATAL);
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