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@@ -20,6 +20,7 @@
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#include <linux/clk.h>
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#include <linux/clk.h>
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#include <asm/io.h>
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#include <asm/io.h>
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+#include <asm/mach-types.h>
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#include <asm/arch/cpu.h>
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#include <asm/arch/cpu.h>
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#include <asm/arch/usb.h>
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#include <asm/arch/usb.h>
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@@ -586,77 +587,53 @@ static int omap1_clk_set_rate(struct clk *clk, unsigned long rate)
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*-------------------------------------------------------------------------*/
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*-------------------------------------------------------------------------*/
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#ifdef CONFIG_OMAP_RESET_CLOCKS
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#ifdef CONFIG_OMAP_RESET_CLOCKS
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-/*
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- * Resets some clocks that may be left on from bootloader,
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- * but leaves serial clocks on. See also omap_late_clk_reset().
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- */
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-static inline void omap1_early_clk_reset(void)
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-{
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- //omap_writel(0x3 << 29, MOD_CONF_CTRL_0);
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-}
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-static int __init omap1_late_clk_reset(void)
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+static void __init omap1_clk_disable_unused(struct clk *clk)
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{
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{
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- /* Turn off all unused clocks */
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- struct clk *p;
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__u32 regval32;
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__u32 regval32;
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- /* USB_REQ_EN will be disabled later if necessary (usb_dc_ck) */
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- regval32 = omap_readw(SOFT_REQ_REG) & (1 << 4);
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- omap_writew(regval32, SOFT_REQ_REG);
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- omap_writew(0, SOFT_REQ_REG2);
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-
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- list_for_each_entry(p, &clocks, node) {
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- if (p->usecount > 0 || (p->flags & ALWAYS_ENABLED) ||
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- p->enable_reg == 0)
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- continue;
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-
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- /* Clocks in the DSP domain need api_ck. Just assume bootloader
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- * has not enabled any DSP clocks */
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- if ((u32)p->enable_reg == DSP_IDLECT2) {
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- printk(KERN_INFO "Skipping reset check for DSP domain "
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- "clock \"%s\"\n", p->name);
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- continue;
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- }
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+ /* Clocks in the DSP domain need api_ck. Just assume bootloader
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+ * has not enabled any DSP clocks */
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+ if ((u32)clk->enable_reg == DSP_IDLECT2) {
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+ printk(KERN_INFO "Skipping reset check for DSP domain "
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+ "clock \"%s\"\n", clk->name);
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+ return;
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+ }
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- /* Is the clock already disabled? */
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- if (p->flags & ENABLE_REG_32BIT) {
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- if (p->flags & VIRTUAL_IO_ADDRESS)
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- regval32 = __raw_readl(p->enable_reg);
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- else
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- regval32 = omap_readl(p->enable_reg);
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- } else {
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- if (p->flags & VIRTUAL_IO_ADDRESS)
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- regval32 = __raw_readw(p->enable_reg);
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+ /* Is the clock already disabled? */
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+ if (clk->flags & ENABLE_REG_32BIT) {
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+ if (clk->flags & VIRTUAL_IO_ADDRESS)
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+ regval32 = __raw_readl(clk->enable_reg);
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else
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else
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- regval32 = omap_readw(p->enable_reg);
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- }
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-
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- if ((regval32 & (1 << p->enable_bit)) == 0)
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- continue;
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+ regval32 = omap_readl(clk->enable_reg);
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+ } else {
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+ if (clk->flags & VIRTUAL_IO_ADDRESS)
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+ regval32 = __raw_readw(clk->enable_reg);
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+ else
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+ regval32 = omap_readw(clk->enable_reg);
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+ }
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- /* FIXME: This clock seems to be necessary but no-one
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- * has asked for its activation. */
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- if (p == &tc2_ck // FIX: pm.c (SRAM), CCP, Camera
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- || p == &ck_dpll1out.clk // FIX: SoSSI, SSR
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- || p == &arm_gpio_ck // FIX: GPIO code for 1510
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- ) {
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- printk(KERN_INFO "FIXME: Clock \"%s\" seems unused\n",
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- p->name);
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- continue;
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- }
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+ if ((regval32 & (1 << clk->enable_bit)) == 0)
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+ return;
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- printk(KERN_INFO "Disabling unused clock \"%s\"... ", p->name);
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- p->disable(p);
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- printk(" done\n");
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+ /* FIXME: This clock seems to be necessary but no-one
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+ * has asked for its activation. */
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+ if (clk == &tc2_ck // FIX: pm.c (SRAM), CCP, Camera
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+ || clk == &ck_dpll1out.clk // FIX: SoSSI, SSR
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+ || clk == &arm_gpio_ck // FIX: GPIO code for 1510
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+ ) {
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+ printk(KERN_INFO "FIXME: Clock \"%s\" seems unused\n",
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+ clk->name);
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+ return;
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}
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}
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- return 0;
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+ printk(KERN_INFO "Disabling unused clock \"%s\"... ", clk->name);
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+ clk->disable(clk);
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+ printk(" done\n");
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}
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}
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-late_initcall(omap1_late_clk_reset);
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#else
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#else
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-#define omap1_early_clk_reset() {}
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+#define omap1_clk_disable_unused NULL
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#endif
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#endif
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static struct clk_functions omap1_clk_functions = {
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static struct clk_functions omap1_clk_functions = {
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@@ -664,6 +641,7 @@ static struct clk_functions omap1_clk_functions = {
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.clk_disable = omap1_clk_disable,
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.clk_disable = omap1_clk_disable,
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.clk_round_rate = omap1_clk_round_rate,
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.clk_round_rate = omap1_clk_round_rate,
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.clk_set_rate = omap1_clk_set_rate,
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.clk_set_rate = omap1_clk_set_rate,
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+ .clk_disable_unused = omap1_clk_disable_unused,
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};
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};
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int __init omap1_clk_init(void)
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int __init omap1_clk_init(void)
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@@ -671,8 +649,13 @@ int __init omap1_clk_init(void)
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struct clk ** clkp;
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struct clk ** clkp;
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const struct omap_clock_config *info;
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const struct omap_clock_config *info;
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int crystal_type = 0; /* Default 12 MHz */
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int crystal_type = 0; /* Default 12 MHz */
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+ u32 reg;
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+
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+ /* USB_REQ_EN will be disabled later if necessary (usb_dc_ck) */
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+ reg = omap_readw(SOFT_REQ_REG) & (1 << 4);
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+ omap_writew(reg, SOFT_REQ_REG);
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+ omap_writew(0, SOFT_REQ_REG2);
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- omap1_early_clk_reset();
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clk_init(&omap1_clk_functions);
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clk_init(&omap1_clk_functions);
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/* By default all idlect1 clocks are allowed to idle */
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/* By default all idlect1 clocks are allowed to idle */
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@@ -772,6 +755,12 @@ int __init omap1_clk_init(void)
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omap_writew(omap_readw(OMAP730_PCC_UPLD_CTRL) & ~0x1, OMAP730_PCC_UPLD_CTRL);
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omap_writew(omap_readw(OMAP730_PCC_UPLD_CTRL) & ~0x1, OMAP730_PCC_UPLD_CTRL);
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#endif
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#endif
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+ /* Amstrad Delta wants BCLK high when inactive */
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+ if (machine_is_ams_delta())
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+ omap_writel(omap_readl(ULPD_CLOCK_CTRL) |
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+ (1 << SDW_MCLK_INV_BIT),
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+ ULPD_CLOCK_CTRL);
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+
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/* Turn off DSP and ARM_TIMXO. Make sure ARM_INTHCK is not divided */
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/* Turn off DSP and ARM_TIMXO. Make sure ARM_INTHCK is not divided */
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/* (on 730, bit 13 must not be cleared) */
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/* (on 730, bit 13 must not be cleared) */
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if (cpu_is_omap730())
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if (cpu_is_omap730())
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