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+/*
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+ * lpc32xx_adc.c - Support for ADC in LPC32XX
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+ *
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+ * 3-channel, 10-bit ADC
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+ *
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+ * Copyright (C) 2011, 2012 Roland Stigge <stigge@antcom.de>
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+ *
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+ * This program is free software; you can redistribute it and/or modify
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+ * it under the terms of the GNU General Public License as published by
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+ * the Free Software Foundation; either version 2 of the License, or
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+ * (at your option) any later version.
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+ *
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+ * This program is distributed in the hope that it will be useful,
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+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
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+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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+ * GNU General Public License for more details.
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+ *
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+ * You should have received a copy of the GNU General Public License
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+ * along with this program; if not, write to the Free Software
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+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
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+ */
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+
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+#include <linux/module.h>
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+#include <linux/platform_device.h>
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+#include <linux/interrupt.h>
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+#include <linux/device.h>
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+#include <linux/kernel.h>
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+#include <linux/slab.h>
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+#include <linux/io.h>
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+#include <linux/clk.h>
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+#include <linux/err.h>
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+#include <linux/completion.h>
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+
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+#include "../iio.h"
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+#include "../sysfs.h"
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+
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+/*
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+ * LPC32XX registers definitions
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+ */
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+#define LPC32XX_ADC_SELECT(x) ((x) + 0x04)
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+#define LPC32XX_ADC_CTRL(x) ((x) + 0x08)
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+#define LPC32XX_ADC_VALUE(x) ((x) + 0x48)
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+
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+/* Bit definitions for LPC32XX_ADC_SELECT: */
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+#define AD_REFm 0x00000200 /* constant, always write this value! */
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+#define AD_REFp 0x00000080 /* constant, always write this value! */
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+#define AD_IN 0x00000010 /* multiple of this is the */
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+ /* channel number: 0, 1, 2 */
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+#define AD_INTERNAL 0x00000004 /* constant, always write this value! */
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+
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+/* Bit definitions for LPC32XX_ADC_CTRL: */
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+#define AD_STROBE 0x00000002
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+#define AD_PDN_CTRL 0x00000004
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+
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+/* Bit definitions for LPC32XX_ADC_VALUE: */
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+#define ADC_VALUE_MASK 0x000003FF
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+
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+#define MOD_NAME "lpc32xx-adc"
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+
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+struct lpc32xx_adc_info {
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+ void __iomem *adc_base;
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+ struct clk *clk;
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+ struct completion completion;
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+
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+ u32 value;
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+};
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+
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+static int lpc32xx_read_raw(struct iio_dev *indio_dev,
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+ struct iio_chan_spec const *chan,
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+ int *val,
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+ int *val2,
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+ long mask)
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+{
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+ struct lpc32xx_adc_info *info = iio_priv(indio_dev);
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+
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+ if (mask == 0) {
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+ mutex_lock(&indio_dev->mlock);
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+ clk_enable(info->clk);
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+ /* Measurement setup */
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+ __raw_writel(AD_INTERNAL | (chan->address) | AD_REFp | AD_REFm,
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+ LPC32XX_ADC_SELECT(info->adc_base));
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+ /* Trigger conversion */
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+ __raw_writel(AD_PDN_CTRL | AD_STROBE,
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+ LPC32XX_ADC_CTRL(info->adc_base));
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+ wait_for_completion(&info->completion); /* set by ISR */
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+ clk_disable(info->clk);
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+ *val = info->value;
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+ mutex_unlock(&indio_dev->mlock);
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+
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+ return IIO_VAL_INT;
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+ }
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+
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+ return -EINVAL;
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+}
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+
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+static const struct iio_info lpc32xx_adc_iio_info = {
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+ .read_raw = &lpc32xx_read_raw,
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+ .driver_module = THIS_MODULE,
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+};
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+
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+#define LPC32XX_ADC_CHANNEL(_index) { \
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+ .type = IIO_VOLTAGE, \
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+ .indexed = 1, \
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+ .channel = _index, \
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+ .address = AD_IN * _index, \
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+ .scan_index = _index, \
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+}
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+
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+static struct iio_chan_spec lpc32xx_adc_iio_channels[] = {
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+ LPC32XX_ADC_CHANNEL(0),
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+ LPC32XX_ADC_CHANNEL(1),
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+ LPC32XX_ADC_CHANNEL(2),
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+};
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+
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+static irqreturn_t lpc32xx_adc_isr(int irq, void *dev_id)
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+{
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+ struct lpc32xx_adc_info *info = (struct lpc32xx_adc_info *) dev_id;
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+
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+ /* Read value and clear irq */
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+ info->value = __raw_readl(LPC32XX_ADC_VALUE(info->adc_base)) &
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+ ADC_VALUE_MASK;
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+ complete(&info->completion);
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+
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+ return IRQ_HANDLED;
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+}
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+
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+static int __devinit lpc32xx_adc_probe(struct platform_device *pdev)
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+{
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+ struct lpc32xx_adc_info *info = NULL;
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+ struct resource *res;
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+ int retval = -ENODEV;
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+ struct iio_dev *iodev = NULL;
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+ int irq;
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+
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+ res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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+ if (!res) {
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+ dev_err(&pdev->dev, "failed to get platform I/O memory\n");
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+ retval = -EBUSY;
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+ goto errout1;
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+ }
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+
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+ iodev = iio_allocate_device(sizeof(struct lpc32xx_adc_info));
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+ if (!iodev) {
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+ dev_err(&pdev->dev, "failed allocating iio device\n");
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+ retval = -ENOMEM;
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+ goto errout1;
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+ }
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+
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+ info = iio_priv(iodev);
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+
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+ info->adc_base = ioremap(res->start, res->end - res->start + 1);
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+ if (!info->adc_base) {
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+ dev_err(&pdev->dev, "failed mapping memory\n");
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+ retval = -EBUSY;
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+ goto errout2;
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+ }
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+
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+ info->clk = clk_get(&pdev->dev, NULL);
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+ if (IS_ERR(info->clk)) {
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+ dev_err(&pdev->dev, "failed getting clock\n");
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+ goto errout3;
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+ }
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+
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+ irq = platform_get_irq(pdev, 0);
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+ if ((irq < 0) || (irq >= NR_IRQS)) {
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+ dev_err(&pdev->dev, "failed getting interrupt resource\n");
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+ retval = -EINVAL;
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+ goto errout4;
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+ }
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+
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+ retval = request_irq(irq, lpc32xx_adc_isr, 0, MOD_NAME, info);
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+ if (retval < 0) {
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+ dev_err(&pdev->dev, "failed requesting interrupt\n");
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+ goto errout4;
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+ }
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+
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+ platform_set_drvdata(pdev, iodev);
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+
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+ init_completion(&info->completion);
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+
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+ iodev->name = MOD_NAME;
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+ iodev->dev.parent = &pdev->dev;
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+ iodev->info = &lpc32xx_adc_iio_info;
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+ iodev->modes = INDIO_DIRECT_MODE;
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+ iodev->channels = lpc32xx_adc_iio_channels;
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+ iodev->num_channels = ARRAY_SIZE(lpc32xx_adc_iio_channels);
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+
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+ retval = iio_device_register(iodev);
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+ if (retval)
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+ goto errout5;
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+
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+ dev_info(&pdev->dev, "LPC32XX ADC driver loaded, IRQ %d\n", irq);
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+
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+ return 0;
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+
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+errout5:
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+ free_irq(irq, iodev);
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+errout4:
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+ clk_put(info->clk);
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+errout3:
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+ iounmap(info->adc_base);
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+errout2:
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+ iio_free_device(iodev);
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+errout1:
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+ return retval;
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+}
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+
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+static int __devexit lpc32xx_adc_remove(struct platform_device *pdev)
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+{
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+ struct iio_dev *iodev = platform_get_drvdata(pdev);
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+ struct lpc32xx_adc_info *info = iio_priv(iodev);
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+ int irq = platform_get_irq(pdev, 0);
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+
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+ iio_device_unregister(iodev);
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+ free_irq(irq, iodev);
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+ platform_set_drvdata(pdev, NULL);
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+ clk_put(info->clk);
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+ iounmap(info->adc_base);
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+ iio_free_device(iodev);
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+
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+ return 0;
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+}
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+
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+static struct platform_driver lpc32xx_adc_driver = {
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+ .probe = lpc32xx_adc_probe,
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+ .remove = __devexit_p(lpc32xx_adc_remove),
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+ .driver = {
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+ .name = MOD_NAME,
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+ .owner = THIS_MODULE,
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+ },
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+};
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+
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+module_platform_driver(lpc32xx_adc_driver);
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+
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+MODULE_AUTHOR("Roland Stigge <stigge@antcom.de>");
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+MODULE_DESCRIPTION("LPC32XX ADC driver");
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+MODULE_LICENSE("GPL");
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