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@@ -74,10 +74,39 @@ static inline void __send_IPI_shortcut(unsigned int shortcut, int vector, unsign
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apic_write(APIC_ICR, cfg);
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}
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+/*
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+ * This is used to send an IPI with no shorthand notation (the destination is
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+ * specified in bits 56 to 63 of the ICR).
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+ */
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+static inline void __send_IPI_dest_field(unsigned int mask, int vector, unsigned int dest)
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+{
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+ unsigned long cfg;
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+
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+ /*
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+ * Wait for idle.
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+ */
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+ apic_wait_icr_idle();
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+
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+ /*
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+ * prepare target chip field
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+ */
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+ cfg = __prepare_ICR2(mask);
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+ apic_write(APIC_ICR2, cfg);
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+
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+ /*
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+ * program the ICR
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+ */
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+ cfg = __prepare_ICR(0, vector, dest);
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+
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+ /*
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+ * Send the IPI. The write to APIC_ICR fires this off.
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+ */
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+ apic_write(APIC_ICR, cfg);
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+}
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static inline void send_IPI_mask_sequence(cpumask_t mask, int vector)
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{
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- unsigned long cfg, flags;
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+ unsigned long flags;
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unsigned long query_cpu;
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/*
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@@ -86,28 +115,9 @@ static inline void send_IPI_mask_sequence(cpumask_t mask, int vector)
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* - mbligh
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*/
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local_irq_save(flags);
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-
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for_each_cpu_mask(query_cpu, mask) {
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- /*
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- * Wait for idle.
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- */
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- apic_wait_icr_idle();
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-
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- /*
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- * prepare target chip field
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- */
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- cfg = __prepare_ICR2(x86_cpu_to_apicid[query_cpu]);
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- apic_write(APIC_ICR2, cfg);
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-
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- /*
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- * program the ICR
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- */
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- cfg = __prepare_ICR(0, vector, APIC_DEST_PHYSICAL);
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-
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- /*
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- * Send the IPI. The write to APIC_ICR fires this off.
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- */
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- apic_write(APIC_ICR, cfg);
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+ __send_IPI_dest_field(x86_cpu_to_apicid[query_cpu],
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+ vector, APIC_DEST_PHYSICAL);
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}
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local_irq_restore(flags);
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}
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