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@@ -509,7 +509,7 @@ static void bnx2x_emac_init(struct link_params *params,
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}
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static int bnx2x_emac_enable(struct link_params *params,
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- struct link_vars *vars, u8 lb)
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+ struct link_vars *vars, u8 lb)
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{
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struct bnx2x *bp = params->bp;
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u8 port = params->port;
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@@ -1613,7 +1613,172 @@ static void bnx2x_xgxs_deassert(struct link_params *params)
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params->phy[INT_PHY].def_md_devad);
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}
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+static void bnx2x_calc_ieee_aneg_adv(struct bnx2x_phy *phy,
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+ struct link_params *params, u16 *ieee_fc)
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+{
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+ struct bnx2x *bp = params->bp;
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+ *ieee_fc = MDIO_COMBO_IEEE0_AUTO_NEG_ADV_FULL_DUPLEX;
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+ /**
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+ * resolve pause mode and advertisement Please refer to Table
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+ * 28B-3 of the 802.3ab-1999 spec
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+ */
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+
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+ switch (phy->req_flow_ctrl) {
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+ case BNX2X_FLOW_CTRL_AUTO:
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+ if (params->req_fc_auto_adv == BNX2X_FLOW_CTRL_BOTH)
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+ *ieee_fc |= MDIO_COMBO_IEEE0_AUTO_NEG_ADV_PAUSE_BOTH;
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+ else
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+ *ieee_fc |=
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+ MDIO_COMBO_IEEE0_AUTO_NEG_ADV_PAUSE_ASYMMETRIC;
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+ break;
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+
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+ case BNX2X_FLOW_CTRL_TX:
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+ *ieee_fc |= MDIO_COMBO_IEEE0_AUTO_NEG_ADV_PAUSE_ASYMMETRIC;
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+ break;
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+
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+ case BNX2X_FLOW_CTRL_RX:
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+ case BNX2X_FLOW_CTRL_BOTH:
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+ *ieee_fc |= MDIO_COMBO_IEEE0_AUTO_NEG_ADV_PAUSE_BOTH;
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+ break;
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+
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+ case BNX2X_FLOW_CTRL_NONE:
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+ default:
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+ *ieee_fc |= MDIO_COMBO_IEEE0_AUTO_NEG_ADV_PAUSE_NONE;
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+ break;
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+ }
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+ DP(NETIF_MSG_LINK, "ieee_fc = 0x%x\n", *ieee_fc);
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+}
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+
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+static void set_phy_vars(struct link_params *params,
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+ struct link_vars *vars)
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+{
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+ struct bnx2x *bp = params->bp;
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+ u8 actual_phy_idx, phy_index, link_cfg_idx;
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+ u8 phy_config_swapped = params->multi_phy_config &
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+ PORT_HW_CFG_PHY_SWAPPED_ENABLED;
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+ for (phy_index = INT_PHY; phy_index < params->num_phys;
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+ phy_index++) {
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+ link_cfg_idx = LINK_CONFIG_IDX(phy_index);
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+ actual_phy_idx = phy_index;
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+ if (phy_config_swapped) {
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+ if (phy_index == EXT_PHY1)
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+ actual_phy_idx = EXT_PHY2;
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+ else if (phy_index == EXT_PHY2)
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+ actual_phy_idx = EXT_PHY1;
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+ }
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+ params->phy[actual_phy_idx].req_flow_ctrl =
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+ params->req_flow_ctrl[link_cfg_idx];
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+
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+ params->phy[actual_phy_idx].req_line_speed =
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+ params->req_line_speed[link_cfg_idx];
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+
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+ params->phy[actual_phy_idx].speed_cap_mask =
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+ params->speed_cap_mask[link_cfg_idx];
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+ params->phy[actual_phy_idx].req_duplex =
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+ params->req_duplex[link_cfg_idx];
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+
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+ if (params->req_line_speed[link_cfg_idx] ==
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+ SPEED_AUTO_NEG)
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+ vars->link_status |= LINK_STATUS_AUTO_NEGOTIATE_ENABLED;
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+
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+ DP(NETIF_MSG_LINK, "req_flow_ctrl %x, req_line_speed %x,"
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+ " speed_cap_mask %x\n",
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+ params->phy[actual_phy_idx].req_flow_ctrl,
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+ params->phy[actual_phy_idx].req_line_speed,
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+ params->phy[actual_phy_idx].speed_cap_mask);
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+ }
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+}
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+
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+static void bnx2x_ext_phy_set_pause(struct link_params *params,
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+ struct bnx2x_phy *phy,
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+ struct link_vars *vars)
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+{
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+ u16 val;
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+ struct bnx2x *bp = params->bp;
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+ /* read modify write pause advertizing */
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+ bnx2x_cl45_read(bp, phy, MDIO_AN_DEVAD, MDIO_AN_REG_ADV_PAUSE, &val);
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+
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+ val &= ~MDIO_AN_REG_ADV_PAUSE_BOTH;
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+
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+ /* Please refer to Table 28B-3 of 802.3ab-1999 spec. */
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+ bnx2x_calc_ieee_aneg_adv(phy, params, &vars->ieee_fc);
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+ if ((vars->ieee_fc &
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+ MDIO_COMBO_IEEE0_AUTO_NEG_ADV_PAUSE_ASYMMETRIC) ==
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+ MDIO_COMBO_IEEE0_AUTO_NEG_ADV_PAUSE_ASYMMETRIC) {
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+ val |= MDIO_AN_REG_ADV_PAUSE_ASYMMETRIC;
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+ }
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+ if ((vars->ieee_fc &
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+ MDIO_COMBO_IEEE0_AUTO_NEG_ADV_PAUSE_BOTH) ==
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+ MDIO_COMBO_IEEE0_AUTO_NEG_ADV_PAUSE_BOTH) {
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+ val |= MDIO_AN_REG_ADV_PAUSE_PAUSE;
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+ }
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+ DP(NETIF_MSG_LINK, "Ext phy AN advertize 0x%x\n", val);
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+ bnx2x_cl45_write(bp, phy, MDIO_AN_DEVAD, MDIO_AN_REG_ADV_PAUSE, val);
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+}
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+
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+static void bnx2x_pause_resolve(struct link_vars *vars, u32 pause_result)
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+{ /* LD LP */
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+ switch (pause_result) { /* ASYM P ASYM P */
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+ case 0xb: /* 1 0 1 1 */
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+ vars->flow_ctrl = BNX2X_FLOW_CTRL_TX;
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+ break;
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+
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+ case 0xe: /* 1 1 1 0 */
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+ vars->flow_ctrl = BNX2X_FLOW_CTRL_RX;
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+ break;
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+
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+ case 0x5: /* 0 1 0 1 */
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+ case 0x7: /* 0 1 1 1 */
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+ case 0xd: /* 1 1 0 1 */
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+ case 0xf: /* 1 1 1 1 */
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+ vars->flow_ctrl = BNX2X_FLOW_CTRL_BOTH;
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+ break;
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+
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+ default:
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+ break;
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+ }
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+ if (pause_result & (1<<0))
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+ vars->link_status |= LINK_STATUS_LINK_PARTNER_SYMMETRIC_PAUSE;
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+ if (pause_result & (1<<1))
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+ vars->link_status |= LINK_STATUS_LINK_PARTNER_ASYMMETRIC_PAUSE;
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+}
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+
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+static u8 bnx2x_ext_phy_resolve_fc(struct bnx2x_phy *phy,
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+ struct link_params *params,
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+ struct link_vars *vars)
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+{
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+ struct bnx2x *bp = params->bp;
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+ u16 ld_pause; /* local */
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+ u16 lp_pause; /* link partner */
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+ u16 pause_result;
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+ u8 ret = 0;
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+ /* read twice */
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+
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+ vars->flow_ctrl = BNX2X_FLOW_CTRL_NONE;
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+
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+ if (phy->req_flow_ctrl != BNX2X_FLOW_CTRL_AUTO)
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+ vars->flow_ctrl = phy->req_flow_ctrl;
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+ else if (phy->req_line_speed != SPEED_AUTO_NEG)
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+ vars->flow_ctrl = params->req_fc_auto_adv;
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+ else if (vars->link_status & LINK_STATUS_AUTO_NEGOTIATE_COMPLETE) {
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+ ret = 1;
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+ bnx2x_cl45_read(bp, phy,
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+ MDIO_AN_DEVAD,
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+ MDIO_AN_REG_ADV_PAUSE, &ld_pause);
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+ bnx2x_cl45_read(bp, phy,
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+ MDIO_AN_DEVAD,
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+ MDIO_AN_REG_LP_AUTO_NEG, &lp_pause);
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+ pause_result = (ld_pause &
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+ MDIO_AN_REG_ADV_PAUSE_MASK) >> 8;
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+ pause_result |= (lp_pause &
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+ MDIO_AN_REG_ADV_PAUSE_MASK) >> 10;
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+ DP(NETIF_MSG_LINK, "Ext PHY pause result 0x%x\n",
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+ pause_result);
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+ bnx2x_pause_resolve(vars, pause_result);
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+ }
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+ return ret;
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+}
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void bnx2x_link_status_update(struct link_params *params,
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struct link_vars *vars)
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{
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@@ -2078,8 +2243,8 @@ static void bnx2x_program_serdes(struct bnx2x_phy *phy,
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}
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-static void bnx2x_set_brcm_cl37_advertisment(struct bnx2x_phy *phy,
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- struct link_params *params)
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+static void bnx2x_set_brcm_cl37_advertisement(struct bnx2x_phy *phy,
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+ struct link_params *params)
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{
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struct bnx2x *bp = params->bp;
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u16 val = 0;
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@@ -2100,44 +2265,9 @@ static void bnx2x_set_brcm_cl37_advertisment(struct bnx2x_phy *phy,
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MDIO_OVER_1G_UP3, 0x400);
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}
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-static void bnx2x_calc_ieee_aneg_adv(struct bnx2x_phy *phy,
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- struct link_params *params, u16 *ieee_fc)
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-{
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- struct bnx2x *bp = params->bp;
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- *ieee_fc = MDIO_COMBO_IEEE0_AUTO_NEG_ADV_FULL_DUPLEX;
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- /*
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- * Resolve pause mode and advertisement.
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- * Please refer to Table 28B-3 of the 802.3ab-1999 spec
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- */
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-
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- switch (phy->req_flow_ctrl) {
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- case BNX2X_FLOW_CTRL_AUTO:
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- if (params->req_fc_auto_adv == BNX2X_FLOW_CTRL_BOTH)
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- *ieee_fc |= MDIO_COMBO_IEEE0_AUTO_NEG_ADV_PAUSE_BOTH;
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- else
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- *ieee_fc |=
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- MDIO_COMBO_IEEE0_AUTO_NEG_ADV_PAUSE_ASYMMETRIC;
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- break;
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- case BNX2X_FLOW_CTRL_TX:
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- *ieee_fc |= MDIO_COMBO_IEEE0_AUTO_NEG_ADV_PAUSE_ASYMMETRIC;
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- break;
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-
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- case BNX2X_FLOW_CTRL_RX:
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- case BNX2X_FLOW_CTRL_BOTH:
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- *ieee_fc |= MDIO_COMBO_IEEE0_AUTO_NEG_ADV_PAUSE_BOTH;
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- break;
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-
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- case BNX2X_FLOW_CTRL_NONE:
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- default:
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- *ieee_fc |= MDIO_COMBO_IEEE0_AUTO_NEG_ADV_PAUSE_NONE;
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- break;
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- }
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- DP(NETIF_MSG_LINK, "ieee_fc = 0x%x\n", *ieee_fc);
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-}
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-
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-static void bnx2x_set_ieee_aneg_advertisment(struct bnx2x_phy *phy,
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- struct link_params *params,
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- u16 ieee_fc)
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+static void bnx2x_set_ieee_aneg_advertisement(struct bnx2x_phy *phy,
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+ struct link_params *params,
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+ u16 ieee_fc)
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{
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struct bnx2x *bp = params->bp;
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u16 val;
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@@ -2271,33 +2401,6 @@ static void bnx2x_initialize_sgmii_process(struct bnx2x_phy *phy,
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* link management
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*/
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-static void bnx2x_pause_resolve(struct link_vars *vars, u32 pause_result)
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-{ /* LD LP */
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- switch (pause_result) { /* ASYM P ASYM P */
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- case 0xb: /* 1 0 1 1 */
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- vars->flow_ctrl = BNX2X_FLOW_CTRL_TX;
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- break;
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-
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- case 0xe: /* 1 1 1 0 */
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- vars->flow_ctrl = BNX2X_FLOW_CTRL_RX;
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- break;
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-
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- case 0x5: /* 0 1 0 1 */
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- case 0x7: /* 0 1 1 1 */
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- case 0xd: /* 1 1 0 1 */
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- case 0xf: /* 1 1 1 1 */
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- vars->flow_ctrl = BNX2X_FLOW_CTRL_BOTH;
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- break;
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-
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- default:
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- break;
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- }
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- if (pause_result & (1<<0))
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- vars->link_status |= LINK_STATUS_LINK_PARTNER_SYMMETRIC_PAUSE;
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- if (pause_result & (1<<1))
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- vars->link_status |= LINK_STATUS_LINK_PARTNER_ASYMMETRIC_PAUSE;
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-}
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-
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static int bnx2x_direct_parallel_detect_used(struct bnx2x_phy *phy,
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struct link_params *params)
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{
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@@ -2402,7 +2505,7 @@ static void bnx2x_check_fallback_to_cl37(struct bnx2x_phy *phy,
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struct link_params *params)
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{
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struct bnx2x *bp = params->bp;
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- u16 rx_status, ustat_val, cl37_fsm_recieved;
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+ u16 rx_status, ustat_val, cl37_fsm_received;
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DP(NETIF_MSG_LINK, "bnx2x_check_fallback_to_cl37\n");
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/* Step 1: Make sure signal is detected */
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CL22_RD_OVER_CL45(bp, phy,
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@@ -2440,15 +2543,15 @@ static void bnx2x_check_fallback_to_cl37(struct bnx2x_phy *phy,
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CL22_RD_OVER_CL45(bp, phy,
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MDIO_REG_BANK_REMOTE_PHY,
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MDIO_REMOTE_PHY_MISC_RX_STATUS,
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- &cl37_fsm_recieved);
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- if ((cl37_fsm_recieved &
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+ &cl37_fsm_received);
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+ if ((cl37_fsm_received &
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(MDIO_REMOTE_PHY_MISC_RX_STATUS_CL37_FSM_RECEIVED_OVER1G_MSG |
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MDIO_REMOTE_PHY_MISC_RX_STATUS_CL37_FSM_RECEIVED_BRCM_OUI_MSG)) !=
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(MDIO_REMOTE_PHY_MISC_RX_STATUS_CL37_FSM_RECEIVED_OVER1G_MSG |
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MDIO_REMOTE_PHY_MISC_RX_STATUS_CL37_FSM_RECEIVED_BRCM_OUI_MSG)) {
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DP(NETIF_MSG_LINK, "No CL37 FSM were received. "
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"misc_rx_status(0x8330) = 0x%x\n",
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- cl37_fsm_recieved);
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+ cl37_fsm_received);
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return;
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}
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/*
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@@ -2761,11 +2864,11 @@ static void bnx2x_init_internal_phy(struct bnx2x_phy *phy,
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DP(NETIF_MSG_LINK, "not SGMII, AN\n");
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/* AN enabled */
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- bnx2x_set_brcm_cl37_advertisment(phy, params);
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+ bnx2x_set_brcm_cl37_advertisement(phy, params);
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/* program duplex & pause advertisement (for aneg) */
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- bnx2x_set_ieee_aneg_advertisment(phy, params,
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- vars->ieee_fc);
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+ bnx2x_set_ieee_aneg_advertisement(phy, params,
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+ vars->ieee_fc);
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/* enable autoneg */
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bnx2x_set_autoneg(phy, params, vars, enable_cl73);
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@@ -3338,7 +3441,8 @@ static int bnx2x_link_initialize(struct link_params *params,
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if (phy_index == EXT_PHY2 &&
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(bnx2x_phy_selection(params) ==
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PORT_HW_CFG_PHY_SELECTION_FIRST_PHY)) {
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- DP(NETIF_MSG_LINK, "Ignoring second phy\n");
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+ DP(NETIF_MSG_LINK, "Not initializing"
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+ " second phy\n");
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continue;
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}
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params->phy[phy_index].config_init(
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@@ -3520,7 +3624,7 @@ int bnx2x_link_update(struct link_params *params, struct link_vars *vars)
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* Step 1:
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* Check external link change only for external phys, and apply
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* priority selection between them in case the link on both phys
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- * is up. Note that the instead of the common vars, a temporary
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+ * is up. Note that instead of the common vars, a temporary
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* vars argument is used since each phy may have different link/
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* speed/duplex result
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*/
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@@ -3704,7 +3808,7 @@ int bnx2x_link_update(struct link_params *params, struct link_vars *vars)
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}
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/*
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* Link is up only if both local phy and external phy (in case of
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- * non-direct board) are up
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+ * non-direct board) are up and no fault detected on active PHY.
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*/
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vars->link_up = (vars->phy_link_up &&
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(ext_phy_link_up ||
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@@ -3756,69 +3860,6 @@ static void bnx2x_save_bcm_spirom_ver(struct bnx2x *bp,
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phy->ver_addr);
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}
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-static void bnx2x_ext_phy_set_pause(struct link_params *params,
|
|
|
- struct bnx2x_phy *phy,
|
|
|
- struct link_vars *vars)
|
|
|
-{
|
|
|
- u16 val;
|
|
|
- struct bnx2x *bp = params->bp;
|
|
|
- /* read modify write pause advertizing */
|
|
|
- bnx2x_cl45_read(bp, phy, MDIO_AN_DEVAD, MDIO_AN_REG_ADV_PAUSE, &val);
|
|
|
-
|
|
|
- val &= ~MDIO_AN_REG_ADV_PAUSE_BOTH;
|
|
|
-
|
|
|
- /* Please refer to Table 28B-3 of 802.3ab-1999 spec. */
|
|
|
- bnx2x_calc_ieee_aneg_adv(phy, params, &vars->ieee_fc);
|
|
|
- if ((vars->ieee_fc &
|
|
|
- MDIO_COMBO_IEEE0_AUTO_NEG_ADV_PAUSE_ASYMMETRIC) ==
|
|
|
- MDIO_COMBO_IEEE0_AUTO_NEG_ADV_PAUSE_ASYMMETRIC) {
|
|
|
- val |= MDIO_AN_REG_ADV_PAUSE_ASYMMETRIC;
|
|
|
- }
|
|
|
- if ((vars->ieee_fc &
|
|
|
- MDIO_COMBO_IEEE0_AUTO_NEG_ADV_PAUSE_BOTH) ==
|
|
|
- MDIO_COMBO_IEEE0_AUTO_NEG_ADV_PAUSE_BOTH) {
|
|
|
- val |= MDIO_AN_REG_ADV_PAUSE_PAUSE;
|
|
|
- }
|
|
|
- DP(NETIF_MSG_LINK, "Ext phy AN advertize 0x%x\n", val);
|
|
|
- bnx2x_cl45_write(bp, phy, MDIO_AN_DEVAD, MDIO_AN_REG_ADV_PAUSE, val);
|
|
|
-}
|
|
|
-
|
|
|
-static u8 bnx2x_ext_phy_resolve_fc(struct bnx2x_phy *phy,
|
|
|
- struct link_params *params,
|
|
|
- struct link_vars *vars)
|
|
|
-{
|
|
|
- struct bnx2x *bp = params->bp;
|
|
|
- u16 ld_pause; /* local */
|
|
|
- u16 lp_pause; /* link partner */
|
|
|
- u16 pause_result;
|
|
|
- u8 ret = 0;
|
|
|
- /* read twice */
|
|
|
-
|
|
|
- vars->flow_ctrl = BNX2X_FLOW_CTRL_NONE;
|
|
|
-
|
|
|
- if (phy->req_flow_ctrl != BNX2X_FLOW_CTRL_AUTO)
|
|
|
- vars->flow_ctrl = phy->req_flow_ctrl;
|
|
|
- else if (phy->req_line_speed != SPEED_AUTO_NEG)
|
|
|
- vars->flow_ctrl = params->req_fc_auto_adv;
|
|
|
- else if (vars->link_status & LINK_STATUS_AUTO_NEGOTIATE_COMPLETE) {
|
|
|
- ret = 1;
|
|
|
- bnx2x_cl45_read(bp, phy,
|
|
|
- MDIO_AN_DEVAD,
|
|
|
- MDIO_AN_REG_ADV_PAUSE, &ld_pause);
|
|
|
- bnx2x_cl45_read(bp, phy,
|
|
|
- MDIO_AN_DEVAD,
|
|
|
- MDIO_AN_REG_LP_AUTO_NEG, &lp_pause);
|
|
|
- pause_result = (ld_pause &
|
|
|
- MDIO_AN_REG_ADV_PAUSE_MASK) >> 8;
|
|
|
- pause_result |= (lp_pause &
|
|
|
- MDIO_AN_REG_ADV_PAUSE_MASK) >> 10;
|
|
|
- DP(NETIF_MSG_LINK, "Ext PHY pause result 0x%x\n",
|
|
|
- pause_result);
|
|
|
- bnx2x_pause_resolve(vars, pause_result);
|
|
|
- }
|
|
|
- return ret;
|
|
|
-}
|
|
|
-
|
|
|
static void bnx2x_ext_phy_10G_an_resolve(struct bnx2x *bp,
|
|
|
struct bnx2x_phy *phy,
|
|
|
struct link_vars *vars)
|
|
@@ -4732,8 +4773,7 @@ static int bnx2x_get_edc_mode(struct bnx2x_phy *phy,
|
|
|
params,
|
|
|
SFP_EEPROM_FC_TX_TECH_ADDR,
|
|
|
1,
|
|
|
- &copper_module_type) !=
|
|
|
- 0) {
|
|
|
+ &copper_module_type) != 0) {
|
|
|
DP(NETIF_MSG_LINK,
|
|
|
"Failed to read copper-cable-type"
|
|
|
" from SFP+ EEPROM\n");
|
|
@@ -5938,7 +5978,7 @@ static u8 bnx2x_8727_read_status(struct bnx2x_phy *phy,
|
|
|
if (!lasi_ctrl)
|
|
|
return 0;
|
|
|
|
|
|
- /* Check the LASI */
|
|
|
+ /* Check the LASI on Rx */
|
|
|
bnx2x_cl45_read(bp, phy,
|
|
|
MDIO_PMA_DEVAD, MDIO_PMA_REG_RX_ALARM,
|
|
|
&rx_alarm_status);
|
|
@@ -6322,10 +6362,10 @@ static int bnx2x_848xx_cmn_config_init(struct bnx2x_phy *phy,
|
|
|
(phy->speed_cap_mask &
|
|
|
PORT_HW_CFG_SPEED_CAPABILITY_D0_10G)) ||
|
|
|
(phy->req_line_speed == SPEED_10000)) {
|
|
|
- DP(NETIF_MSG_LINK, "Advertising 10G\n");
|
|
|
- /* Restart autoneg for 10G*/
|
|
|
+ DP(NETIF_MSG_LINK, "Advertising 10G\n");
|
|
|
+ /* Restart autoneg for 10G*/
|
|
|
|
|
|
- bnx2x_cl45_write(bp, phy,
|
|
|
+ bnx2x_cl45_write(bp, phy,
|
|
|
MDIO_AN_DEVAD, MDIO_AN_REG_CTRL,
|
|
|
0x3200);
|
|
|
} else if (phy->req_line_speed != SPEED_10 &&
|
|
@@ -7031,9 +7071,8 @@ static void bnx2x_7101_set_link_led(struct bnx2x_phy *phy,
|
|
|
static struct bnx2x_phy phy_null = {
|
|
|
.type = PORT_HW_CFG_XGXS_EXT_PHY_TYPE_NOT_CONN,
|
|
|
.addr = 0,
|
|
|
- .flags = FLAGS_INIT_XGXS_FIRST,
|
|
|
.def_md_devad = 0,
|
|
|
- .reserved = 0,
|
|
|
+ .flags = FLAGS_INIT_XGXS_FIRST,
|
|
|
.rx_preemphasis = {0xffff, 0xffff, 0xffff, 0xffff},
|
|
|
.tx_preemphasis = {0xffff, 0xffff, 0xffff, 0xffff},
|
|
|
.mdio_ctrl = 0,
|
|
@@ -7058,9 +7097,8 @@ static struct bnx2x_phy phy_null = {
|
|
|
static struct bnx2x_phy phy_serdes = {
|
|
|
.type = PORT_HW_CFG_SERDES_EXT_PHY_TYPE_DIRECT,
|
|
|
.addr = 0xff,
|
|
|
- .flags = 0,
|
|
|
.def_md_devad = 0,
|
|
|
- .reserved = 0,
|
|
|
+ .flags = 0,
|
|
|
.rx_preemphasis = {0xffff, 0xffff, 0xffff, 0xffff},
|
|
|
.tx_preemphasis = {0xffff, 0xffff, 0xffff, 0xffff},
|
|
|
.mdio_ctrl = 0,
|
|
@@ -7094,9 +7132,8 @@ static struct bnx2x_phy phy_serdes = {
|
|
|
static struct bnx2x_phy phy_xgxs = {
|
|
|
.type = PORT_HW_CFG_XGXS_EXT_PHY_TYPE_DIRECT,
|
|
|
.addr = 0xff,
|
|
|
- .flags = 0,
|
|
|
.def_md_devad = 0,
|
|
|
- .reserved = 0,
|
|
|
+ .flags = 0,
|
|
|
.rx_preemphasis = {0xffff, 0xffff, 0xffff, 0xffff},
|
|
|
.tx_preemphasis = {0xffff, 0xffff, 0xffff, 0xffff},
|
|
|
.mdio_ctrl = 0,
|
|
@@ -7131,9 +7168,8 @@ static struct bnx2x_phy phy_xgxs = {
|
|
|
static struct bnx2x_phy phy_7101 = {
|
|
|
.type = PORT_HW_CFG_XGXS_EXT_PHY_TYPE_SFX7101,
|
|
|
.addr = 0xff,
|
|
|
- .flags = FLAGS_FAN_FAILURE_DET_REQ,
|
|
|
.def_md_devad = 0,
|
|
|
- .reserved = 0,
|
|
|
+ .flags = FLAGS_FAN_FAILURE_DET_REQ,
|
|
|
.rx_preemphasis = {0xffff, 0xffff, 0xffff, 0xffff},
|
|
|
.tx_preemphasis = {0xffff, 0xffff, 0xffff, 0xffff},
|
|
|
.mdio_ctrl = 0,
|
|
@@ -7161,9 +7197,8 @@ static struct bnx2x_phy phy_7101 = {
|
|
|
static struct bnx2x_phy phy_8073 = {
|
|
|
.type = PORT_HW_CFG_XGXS_EXT_PHY_TYPE_BCM8073,
|
|
|
.addr = 0xff,
|
|
|
- .flags = FLAGS_HW_LOCK_REQUIRED,
|
|
|
.def_md_devad = 0,
|
|
|
- .reserved = 0,
|
|
|
+ .flags = FLAGS_HW_LOCK_REQUIRED,
|
|
|
.rx_preemphasis = {0xffff, 0xffff, 0xffff, 0xffff},
|
|
|
.tx_preemphasis = {0xffff, 0xffff, 0xffff, 0xffff},
|
|
|
.mdio_ctrl = 0,
|
|
@@ -7193,9 +7228,8 @@ static struct bnx2x_phy phy_8073 = {
|
|
|
static struct bnx2x_phy phy_8705 = {
|
|
|
.type = PORT_HW_CFG_XGXS_EXT_PHY_TYPE_BCM8705,
|
|
|
.addr = 0xff,
|
|
|
- .flags = FLAGS_INIT_XGXS_FIRST,
|
|
|
.def_md_devad = 0,
|
|
|
- .reserved = 0,
|
|
|
+ .flags = FLAGS_INIT_XGXS_FIRST,
|
|
|
.rx_preemphasis = {0xffff, 0xffff, 0xffff, 0xffff},
|
|
|
.tx_preemphasis = {0xffff, 0xffff, 0xffff, 0xffff},
|
|
|
.mdio_ctrl = 0,
|
|
@@ -7222,9 +7256,8 @@ static struct bnx2x_phy phy_8705 = {
|
|
|
static struct bnx2x_phy phy_8706 = {
|
|
|
.type = PORT_HW_CFG_XGXS_EXT_PHY_TYPE_BCM8706,
|
|
|
.addr = 0xff,
|
|
|
- .flags = FLAGS_INIT_XGXS_FIRST,
|
|
|
.def_md_devad = 0,
|
|
|
- .reserved = 0,
|
|
|
+ .flags = FLAGS_INIT_XGXS_FIRST,
|
|
|
.rx_preemphasis = {0xffff, 0xffff, 0xffff, 0xffff},
|
|
|
.tx_preemphasis = {0xffff, 0xffff, 0xffff, 0xffff},
|
|
|
.mdio_ctrl = 0,
|
|
@@ -7253,10 +7286,9 @@ static struct bnx2x_phy phy_8706 = {
|
|
|
static struct bnx2x_phy phy_8726 = {
|
|
|
.type = PORT_HW_CFG_XGXS_EXT_PHY_TYPE_BCM8726,
|
|
|
.addr = 0xff,
|
|
|
+ .def_md_devad = 0,
|
|
|
.flags = (FLAGS_HW_LOCK_REQUIRED |
|
|
|
FLAGS_INIT_XGXS_FIRST),
|
|
|
- .def_md_devad = 0,
|
|
|
- .reserved = 0,
|
|
|
.rx_preemphasis = {0xffff, 0xffff, 0xffff, 0xffff},
|
|
|
.tx_preemphasis = {0xffff, 0xffff, 0xffff, 0xffff},
|
|
|
.mdio_ctrl = 0,
|
|
@@ -7286,9 +7318,8 @@ static struct bnx2x_phy phy_8726 = {
|
|
|
static struct bnx2x_phy phy_8727 = {
|
|
|
.type = PORT_HW_CFG_XGXS_EXT_PHY_TYPE_BCM8727,
|
|
|
.addr = 0xff,
|
|
|
- .flags = FLAGS_FAN_FAILURE_DET_REQ,
|
|
|
.def_md_devad = 0,
|
|
|
- .reserved = 0,
|
|
|
+ .flags = FLAGS_FAN_FAILURE_DET_REQ,
|
|
|
.rx_preemphasis = {0xffff, 0xffff, 0xffff, 0xffff},
|
|
|
.tx_preemphasis = {0xffff, 0xffff, 0xffff, 0xffff},
|
|
|
.mdio_ctrl = 0,
|
|
@@ -7316,10 +7347,9 @@ static struct bnx2x_phy phy_8727 = {
|
|
|
static struct bnx2x_phy phy_8481 = {
|
|
|
.type = PORT_HW_CFG_XGXS_EXT_PHY_TYPE_BCM8481,
|
|
|
.addr = 0xff,
|
|
|
+ .def_md_devad = 0,
|
|
|
.flags = FLAGS_FAN_FAILURE_DET_REQ |
|
|
|
FLAGS_REARM_LATCH_SIGNAL,
|
|
|
- .def_md_devad = 0,
|
|
|
- .reserved = 0,
|
|
|
.rx_preemphasis = {0xffff, 0xffff, 0xffff, 0xffff},
|
|
|
.tx_preemphasis = {0xffff, 0xffff, 0xffff, 0xffff},
|
|
|
.mdio_ctrl = 0,
|
|
@@ -7353,10 +7383,9 @@ static struct bnx2x_phy phy_8481 = {
|
|
|
static struct bnx2x_phy phy_84823 = {
|
|
|
.type = PORT_HW_CFG_XGXS_EXT_PHY_TYPE_BCM84823,
|
|
|
.addr = 0xff,
|
|
|
+ .def_md_devad = 0,
|
|
|
.flags = FLAGS_FAN_FAILURE_DET_REQ |
|
|
|
FLAGS_REARM_LATCH_SIGNAL,
|
|
|
- .def_md_devad = 0,
|
|
|
- .reserved = 0,
|
|
|
.rx_preemphasis = {0xffff, 0xffff, 0xffff, 0xffff},
|
|
|
.tx_preemphasis = {0xffff, 0xffff, 0xffff, 0xffff},
|
|
|
.mdio_ctrl = 0,
|
|
@@ -7390,10 +7419,9 @@ static struct bnx2x_phy phy_84823 = {
|
|
|
static struct bnx2x_phy phy_84833 = {
|
|
|
.type = PORT_HW_CFG_XGXS_EXT_PHY_TYPE_BCM84833,
|
|
|
.addr = 0xff,
|
|
|
+ .def_md_devad = 0,
|
|
|
.flags = FLAGS_FAN_FAILURE_DET_REQ |
|
|
|
FLAGS_REARM_LATCH_SIGNAL,
|
|
|
- .def_md_devad = 0,
|
|
|
- .reserved = 0,
|
|
|
.rx_preemphasis = {0xffff, 0xffff, 0xffff, 0xffff},
|
|
|
.tx_preemphasis = {0xffff, 0xffff, 0xffff, 0xffff},
|
|
|
.mdio_ctrl = 0,
|
|
@@ -7827,77 +7855,10 @@ int bnx2x_phy_probe(struct link_params *params)
|
|
|
return 0;
|
|
|
}
|
|
|
|
|
|
-static void set_phy_vars(struct link_params *params)
|
|
|
-{
|
|
|
- struct bnx2x *bp = params->bp;
|
|
|
- u8 actual_phy_idx, phy_index, link_cfg_idx;
|
|
|
- u8 phy_config_swapped = params->multi_phy_config &
|
|
|
- PORT_HW_CFG_PHY_SWAPPED_ENABLED;
|
|
|
- for (phy_index = INT_PHY; phy_index < params->num_phys;
|
|
|
- phy_index++) {
|
|
|
- link_cfg_idx = LINK_CONFIG_IDX(phy_index);
|
|
|
- actual_phy_idx = phy_index;
|
|
|
- if (phy_config_swapped) {
|
|
|
- if (phy_index == EXT_PHY1)
|
|
|
- actual_phy_idx = EXT_PHY2;
|
|
|
- else if (phy_index == EXT_PHY2)
|
|
|
- actual_phy_idx = EXT_PHY1;
|
|
|
- }
|
|
|
- params->phy[actual_phy_idx].req_flow_ctrl =
|
|
|
- params->req_flow_ctrl[link_cfg_idx];
|
|
|
-
|
|
|
- params->phy[actual_phy_idx].req_line_speed =
|
|
|
- params->req_line_speed[link_cfg_idx];
|
|
|
-
|
|
|
- params->phy[actual_phy_idx].speed_cap_mask =
|
|
|
- params->speed_cap_mask[link_cfg_idx];
|
|
|
-
|
|
|
- params->phy[actual_phy_idx].req_duplex =
|
|
|
- params->req_duplex[link_cfg_idx];
|
|
|
-
|
|
|
- DP(NETIF_MSG_LINK, "req_flow_ctrl %x, req_line_speed %x,"
|
|
|
- " speed_cap_mask %x\n",
|
|
|
- params->phy[actual_phy_idx].req_flow_ctrl,
|
|
|
- params->phy[actual_phy_idx].req_line_speed,
|
|
|
- params->phy[actual_phy_idx].speed_cap_mask);
|
|
|
- }
|
|
|
-}
|
|
|
-
|
|
|
-int bnx2x_phy_init(struct link_params *params, struct link_vars *vars)
|
|
|
+void bnx2x_init_bmac_loopback(struct link_params *params,
|
|
|
+ struct link_vars *vars)
|
|
|
{
|
|
|
struct bnx2x *bp = params->bp;
|
|
|
- DP(NETIF_MSG_LINK, "Phy Initialization started\n");
|
|
|
- DP(NETIF_MSG_LINK, "(1) req_speed %d, req_flowctrl %d\n",
|
|
|
- params->req_line_speed[0], params->req_flow_ctrl[0]);
|
|
|
- DP(NETIF_MSG_LINK, "(2) req_speed %d, req_flowctrl %d\n",
|
|
|
- params->req_line_speed[1], params->req_flow_ctrl[1]);
|
|
|
- vars->link_status = 0;
|
|
|
- vars->phy_link_up = 0;
|
|
|
- vars->link_up = 0;
|
|
|
- vars->line_speed = 0;
|
|
|
- vars->duplex = DUPLEX_FULL;
|
|
|
- vars->flow_ctrl = BNX2X_FLOW_CTRL_NONE;
|
|
|
- vars->mac_type = MAC_TYPE_NONE;
|
|
|
- vars->phy_flags = 0;
|
|
|
-
|
|
|
- /* disable attentions */
|
|
|
- bnx2x_bits_dis(bp, NIG_REG_MASK_INTERRUPT_PORT0 + params->port*4,
|
|
|
- (NIG_MASK_XGXS0_LINK_STATUS |
|
|
|
- NIG_MASK_XGXS0_LINK10G |
|
|
|
- NIG_MASK_SERDES0_LINK_STATUS |
|
|
|
- NIG_MASK_MI_INT));
|
|
|
-
|
|
|
- bnx2x_emac_init(params, vars);
|
|
|
-
|
|
|
- if (params->num_phys == 0) {
|
|
|
- DP(NETIF_MSG_LINK, "No phy found for initialization !!\n");
|
|
|
- return -EINVAL;
|
|
|
- }
|
|
|
- set_phy_vars(params);
|
|
|
-
|
|
|
- DP(NETIF_MSG_LINK, "Num of phys on board: %d\n", params->num_phys);
|
|
|
- if (params->loopback_mode == LOOPBACK_BMAC) {
|
|
|
-
|
|
|
vars->link_up = 1;
|
|
|
vars->line_speed = SPEED_10000;
|
|
|
vars->duplex = DUPLEX_FULL;
|
|
@@ -7912,9 +7873,12 @@ int bnx2x_phy_init(struct link_params *params, struct link_vars *vars)
|
|
|
bnx2x_bmac_enable(params, vars, 1);
|
|
|
|
|
|
REG_WR(bp, NIG_REG_EGRESS_DRAIN0_MODE + params->port*4, 0);
|
|
|
+}
|
|
|
|
|
|
- } else if (params->loopback_mode == LOOPBACK_EMAC) {
|
|
|
-
|
|
|
+void bnx2x_init_emac_loopback(struct link_params *params,
|
|
|
+ struct link_vars *vars)
|
|
|
+{
|
|
|
+ struct bnx2x *bp = params->bp;
|
|
|
vars->link_up = 1;
|
|
|
vars->line_speed = SPEED_1000;
|
|
|
vars->duplex = DUPLEX_FULL;
|
|
@@ -7928,29 +7892,32 @@ int bnx2x_phy_init(struct link_params *params, struct link_vars *vars)
|
|
|
bnx2x_emac_enable(params, vars, 1);
|
|
|
bnx2x_emac_program(params, vars);
|
|
|
REG_WR(bp, NIG_REG_EGRESS_DRAIN0_MODE + params->port*4, 0);
|
|
|
+}
|
|
|
|
|
|
- } else if ((params->loopback_mode == LOOPBACK_XGXS) ||
|
|
|
- (params->loopback_mode == LOOPBACK_EXT_PHY)) {
|
|
|
-
|
|
|
+void bnx2x_init_xgxs_loopback(struct link_params *params,
|
|
|
+ struct link_vars *vars)
|
|
|
+{
|
|
|
+ struct bnx2x *bp = params->bp;
|
|
|
vars->link_up = 1;
|
|
|
vars->flow_ctrl = BNX2X_FLOW_CTRL_NONE;
|
|
|
vars->duplex = DUPLEX_FULL;
|
|
|
- if (params->req_line_speed[0] == SPEED_1000) {
|
|
|
+ if (params->req_line_speed[0] == SPEED_1000)
|
|
|
vars->line_speed = SPEED_1000;
|
|
|
- vars->mac_type = MAC_TYPE_EMAC;
|
|
|
- } else {
|
|
|
+ else
|
|
|
vars->line_speed = SPEED_10000;
|
|
|
- vars->mac_type = MAC_TYPE_BMAC;
|
|
|
- }
|
|
|
|
|
|
- bnx2x_xgxs_deassert(params);
|
|
|
- bnx2x_link_initialize(params, vars);
|
|
|
|
|
|
- if (params->req_line_speed[0] == SPEED_1000) {
|
|
|
- bnx2x_emac_program(params, vars);
|
|
|
- bnx2x_emac_enable(params, vars, 0);
|
|
|
- } else
|
|
|
- bnx2x_bmac_enable(params, vars, 0);
|
|
|
+ bnx2x_xgxs_deassert(params);
|
|
|
+ bnx2x_link_initialize(params, vars);
|
|
|
+
|
|
|
+ if (params->req_line_speed[0] == SPEED_1000) {
|
|
|
+ bnx2x_emac_program(params, vars);
|
|
|
+ bnx2x_emac_enable(params, vars, 0);
|
|
|
+
|
|
|
+ } else
|
|
|
+ bnx2x_bmac_enable(params, vars, 0);
|
|
|
+
|
|
|
+
|
|
|
if (params->loopback_mode == LOOPBACK_XGXS) {
|
|
|
/* set 10G XGXS loopback */
|
|
|
params->phy[INT_PHY].config_loopback(
|
|
@@ -7970,11 +7937,55 @@ int bnx2x_phy_init(struct link_params *params, struct link_vars *vars)
|
|
|
}
|
|
|
REG_WR(bp, NIG_REG_EGRESS_DRAIN0_MODE + params->port*4, 0);
|
|
|
|
|
|
- bnx2x_set_led(params, vars,
|
|
|
- LED_MODE_OPER, vars->line_speed);
|
|
|
- } else
|
|
|
- /* No loopback */
|
|
|
- {
|
|
|
+ bnx2x_set_led(params, vars, LED_MODE_OPER, vars->line_speed);
|
|
|
+}
|
|
|
+
|
|
|
+int bnx2x_phy_init(struct link_params *params, struct link_vars *vars)
|
|
|
+{
|
|
|
+ struct bnx2x *bp = params->bp;
|
|
|
+ DP(NETIF_MSG_LINK, "Phy Initialization started\n");
|
|
|
+ DP(NETIF_MSG_LINK, "(1) req_speed %d, req_flowctrl %d\n",
|
|
|
+ params->req_line_speed[0], params->req_flow_ctrl[0]);
|
|
|
+ DP(NETIF_MSG_LINK, "(2) req_speed %d, req_flowctrl %d\n",
|
|
|
+ params->req_line_speed[1], params->req_flow_ctrl[1]);
|
|
|
+ vars->link_status = 0;
|
|
|
+ vars->phy_link_up = 0;
|
|
|
+ vars->link_up = 0;
|
|
|
+ vars->line_speed = 0;
|
|
|
+ vars->duplex = DUPLEX_FULL;
|
|
|
+ vars->flow_ctrl = BNX2X_FLOW_CTRL_NONE;
|
|
|
+ vars->mac_type = MAC_TYPE_NONE;
|
|
|
+ vars->phy_flags = 0;
|
|
|
+
|
|
|
+ /* disable attentions */
|
|
|
+ bnx2x_bits_dis(bp, NIG_REG_MASK_INTERRUPT_PORT0 + params->port*4,
|
|
|
+ (NIG_MASK_XGXS0_LINK_STATUS |
|
|
|
+ NIG_MASK_XGXS0_LINK10G |
|
|
|
+ NIG_MASK_SERDES0_LINK_STATUS |
|
|
|
+ NIG_MASK_MI_INT));
|
|
|
+
|
|
|
+ bnx2x_emac_init(params, vars);
|
|
|
+
|
|
|
+ if (params->num_phys == 0) {
|
|
|
+ DP(NETIF_MSG_LINK, "No phy found for initialization !!\n");
|
|
|
+ return -EINVAL;
|
|
|
+ }
|
|
|
+ set_phy_vars(params, vars);
|
|
|
+
|
|
|
+ DP(NETIF_MSG_LINK, "Num of phys on board: %d\n", params->num_phys);
|
|
|
+ switch (params->loopback_mode) {
|
|
|
+ case LOOPBACK_BMAC:
|
|
|
+ bnx2x_init_bmac_loopback(params, vars);
|
|
|
+ break;
|
|
|
+ case LOOPBACK_EMAC:
|
|
|
+ bnx2x_init_emac_loopback(params, vars);
|
|
|
+ break;
|
|
|
+ case LOOPBACK_XGXS:
|
|
|
+ case LOOPBACK_EXT_PHY:
|
|
|
+ bnx2x_init_xgxs_loopback(params, vars);
|
|
|
+ break;
|
|
|
+ default:
|
|
|
+ /* No loopback */
|
|
|
if (params->switch_cfg == SWITCH_CFG_10G)
|
|
|
bnx2x_xgxs_deassert(params);
|
|
|
else
|
|
@@ -7983,6 +7994,7 @@ int bnx2x_phy_init(struct link_params *params, struct link_vars *vars)
|
|
|
bnx2x_link_initialize(params, vars);
|
|
|
msleep(30);
|
|
|
bnx2x_link_int_enable(params);
|
|
|
+ break;
|
|
|
}
|
|
|
return 0;
|
|
|
}
|