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@@ -5899,6 +5899,9 @@ static int ixgbe_tso(struct ixgbe_ring *tx_ring,
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u32 vlan_macip_lens, type_tucmd;
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u32 mss_l4len_idx, l4len;
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+ if (skb->ip_summed != CHECKSUM_PARTIAL)
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+ return 0;
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+
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if (!skb_is_gso(skb))
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return 0;
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@@ -5941,10 +5944,9 @@ static int ixgbe_tso(struct ixgbe_ring *tx_ring,
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first->gso_segs = skb_shinfo(skb)->gso_segs;
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first->bytecount += (first->gso_segs - 1) * *hdr_len;
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- /* mss_l4len_id: use 1 as index for TSO */
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+ /* mss_l4len_id: use 0 as index for TSO */
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mss_l4len_idx = l4len << IXGBE_ADVTXD_L4LEN_SHIFT;
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mss_l4len_idx |= skb_shinfo(skb)->gso_size << IXGBE_ADVTXD_MSS_SHIFT;
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- mss_l4len_idx |= 1 << IXGBE_ADVTXD_IDX_SHIFT;
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/* vlan_macip_lens: HEADLEN, MACLEN, VLAN tag */
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vlan_macip_lens = skb_network_header_len(skb);
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@@ -5966,12 +5968,9 @@ static void ixgbe_tx_csum(struct ixgbe_ring *tx_ring,
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u32 type_tucmd = 0;
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if (skb->ip_summed != CHECKSUM_PARTIAL) {
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- if (!(first->tx_flags & IXGBE_TX_FLAGS_HW_VLAN)) {
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- if (unlikely(skb->no_fcs))
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- first->tx_flags |= IXGBE_TX_FLAGS_NO_IFCS;
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- if (!(first->tx_flags & IXGBE_TX_FLAGS_TXSW))
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- return;
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- }
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+ if (!(first->tx_flags & IXGBE_TX_FLAGS_HW_VLAN) &&
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+ !(first->tx_flags & IXGBE_TX_FLAGS_CC))
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+ return;
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} else {
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u8 l4_hdr = 0;
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switch (first->protocol) {
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@@ -6029,30 +6028,32 @@ static void ixgbe_tx_csum(struct ixgbe_ring *tx_ring,
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type_tucmd, mss_l4len_idx);
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}
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-static __le32 ixgbe_tx_cmd_type(u32 tx_flags)
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+#define IXGBE_SET_FLAG(_input, _flag, _result) \
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+ ((_flag <= _result) ? \
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+ ((u32)(_input & _flag) * (_result / _flag)) : \
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+ ((u32)(_input & _flag) / (_flag / _result)))
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+
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+static u32 ixgbe_tx_cmd_type(struct sk_buff *skb, u32 tx_flags)
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{
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/* set type for advanced descriptor with frame checksum insertion */
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- __le32 cmd_type = cpu_to_le32(IXGBE_ADVTXD_DTYP_DATA |
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- IXGBE_ADVTXD_DCMD_DEXT);
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+ u32 cmd_type = IXGBE_ADVTXD_DTYP_DATA |
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+ IXGBE_ADVTXD_DCMD_DEXT |
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+ IXGBE_ADVTXD_DCMD_IFCS;
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/* set HW vlan bit if vlan is present */
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- if (tx_flags & IXGBE_TX_FLAGS_HW_VLAN)
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- cmd_type |= cpu_to_le32(IXGBE_ADVTXD_DCMD_VLE);
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-
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- if (tx_flags & IXGBE_TX_FLAGS_TSTAMP)
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- cmd_type |= cpu_to_le32(IXGBE_ADVTXD_MAC_TSTAMP);
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+ cmd_type |= IXGBE_SET_FLAG(tx_flags, IXGBE_TX_FLAGS_HW_VLAN,
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+ IXGBE_ADVTXD_DCMD_VLE);
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/* set segmentation enable bits for TSO/FSO */
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-#ifdef IXGBE_FCOE
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- if (tx_flags & (IXGBE_TX_FLAGS_TSO | IXGBE_TX_FLAGS_FSO))
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-#else
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- if (tx_flags & IXGBE_TX_FLAGS_TSO)
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-#endif
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- cmd_type |= cpu_to_le32(IXGBE_ADVTXD_DCMD_TSE);
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+ cmd_type |= IXGBE_SET_FLAG(tx_flags, IXGBE_TX_FLAGS_TSO,
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+ IXGBE_ADVTXD_DCMD_TSE);
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+
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+ /* set timestamp bit if present */
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+ cmd_type |= IXGBE_SET_FLAG(tx_flags, IXGBE_TX_FLAGS_TSTAMP,
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+ IXGBE_ADVTXD_MAC_TSTAMP);
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/* insert frame checksum */
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- if (!(tx_flags & IXGBE_TX_FLAGS_NO_IFCS))
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- cmd_type |= cpu_to_le32(IXGBE_ADVTXD_DCMD_IFCS);
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+ cmd_type ^= IXGBE_SET_FLAG(skb->no_fcs, 1, IXGBE_ADVTXD_DCMD_IFCS);
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return cmd_type;
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}
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@@ -6060,36 +6061,27 @@ static __le32 ixgbe_tx_cmd_type(u32 tx_flags)
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static void ixgbe_tx_olinfo_status(union ixgbe_adv_tx_desc *tx_desc,
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u32 tx_flags, unsigned int paylen)
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{
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- __le32 olinfo_status = cpu_to_le32(paylen << IXGBE_ADVTXD_PAYLEN_SHIFT);
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+ u32 olinfo_status = paylen << IXGBE_ADVTXD_PAYLEN_SHIFT;
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/* enable L4 checksum for TSO and TX checksum offload */
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- if (tx_flags & IXGBE_TX_FLAGS_CSUM)
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- olinfo_status |= cpu_to_le32(IXGBE_ADVTXD_POPTS_TXSM);
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+ olinfo_status |= IXGBE_SET_FLAG(tx_flags,
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+ IXGBE_TX_FLAGS_CSUM,
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+ IXGBE_ADVTXD_POPTS_TXSM);
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/* enble IPv4 checksum for TSO */
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- if (tx_flags & IXGBE_TX_FLAGS_IPV4)
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- olinfo_status |= cpu_to_le32(IXGBE_ADVTXD_POPTS_IXSM);
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-
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- /* use index 1 context for TSO/FSO/FCOE */
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-#ifdef IXGBE_FCOE
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- if (tx_flags & (IXGBE_TX_FLAGS_TSO | IXGBE_TX_FLAGS_FCOE))
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-#else
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- if (tx_flags & IXGBE_TX_FLAGS_TSO)
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-#endif
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- olinfo_status |= cpu_to_le32(1 << IXGBE_ADVTXD_IDX_SHIFT);
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+ olinfo_status |= IXGBE_SET_FLAG(tx_flags,
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+ IXGBE_TX_FLAGS_IPV4,
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+ IXGBE_ADVTXD_POPTS_IXSM);
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/*
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* Check Context must be set if Tx switch is enabled, which it
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* always is for case where virtual functions are running
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*/
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-#ifdef IXGBE_FCOE
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- if (tx_flags & (IXGBE_TX_FLAGS_TXSW | IXGBE_TX_FLAGS_FCOE))
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-#else
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- if (tx_flags & IXGBE_TX_FLAGS_TXSW)
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-#endif
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- olinfo_status |= cpu_to_le32(IXGBE_ADVTXD_CC);
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+ olinfo_status |= IXGBE_SET_FLAG(tx_flags,
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+ IXGBE_TX_FLAGS_CC,
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+ IXGBE_ADVTXD_CC);
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- tx_desc->read.olinfo_status = olinfo_status;
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+ tx_desc->read.olinfo_status = cpu_to_le32(olinfo_status);
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}
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#define IXGBE_TXD_CMD (IXGBE_TXD_CMD_EOP | \
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@@ -6099,22 +6091,22 @@ static void ixgbe_tx_map(struct ixgbe_ring *tx_ring,
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struct ixgbe_tx_buffer *first,
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const u8 hdr_len)
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{
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- dma_addr_t dma;
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struct sk_buff *skb = first->skb;
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struct ixgbe_tx_buffer *tx_buffer;
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union ixgbe_adv_tx_desc *tx_desc;
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- struct skb_frag_struct *frag = &skb_shinfo(skb)->frags[0];
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- unsigned int data_len = skb->data_len;
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- unsigned int size = skb_headlen(skb);
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- unsigned int paylen = skb->len - hdr_len;
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+ struct skb_frag_struct *frag;
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+ dma_addr_t dma;
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+ unsigned int data_len, size;
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u32 tx_flags = first->tx_flags;
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- __le32 cmd_type;
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+ u32 cmd_type = ixgbe_tx_cmd_type(skb, tx_flags);
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u16 i = tx_ring->next_to_use;
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tx_desc = IXGBE_TX_DESC(tx_ring, i);
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- ixgbe_tx_olinfo_status(tx_desc, tx_flags, paylen);
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- cmd_type = ixgbe_tx_cmd_type(tx_flags);
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+ ixgbe_tx_olinfo_status(tx_desc, tx_flags, skb->len - hdr_len);
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+
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+ size = skb_headlen(skb);
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+ data_len = skb->data_len;
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#ifdef IXGBE_FCOE
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if (tx_flags & IXGBE_TX_FLAGS_FCOE) {
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@@ -6128,19 +6120,22 @@ static void ixgbe_tx_map(struct ixgbe_ring *tx_ring,
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#endif
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dma = dma_map_single(tx_ring->dev, skb->data, size, DMA_TO_DEVICE);
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- if (dma_mapping_error(tx_ring->dev, dma))
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- goto dma_error;
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- /* record length, and DMA address */
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- dma_unmap_len_set(first, len, size);
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- dma_unmap_addr_set(first, dma, dma);
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+ tx_buffer = first;
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- tx_desc->read.buffer_addr = cpu_to_le64(dma);
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+ for (frag = &skb_shinfo(skb)->frags[0];; frag++) {
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+ if (dma_mapping_error(tx_ring->dev, dma))
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+ goto dma_error;
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+
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+ /* record length, and DMA address */
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+ dma_unmap_len_set(tx_buffer, len, size);
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+ dma_unmap_addr_set(tx_buffer, dma, dma);
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+
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+ tx_desc->read.buffer_addr = cpu_to_le64(dma);
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- for (;;) {
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while (unlikely(size > IXGBE_MAX_DATA_PER_TXD)) {
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tx_desc->read.cmd_type_len =
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- cmd_type | cpu_to_le32(IXGBE_MAX_DATA_PER_TXD);
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+ cpu_to_le32(cmd_type ^ IXGBE_MAX_DATA_PER_TXD);
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i++;
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tx_desc++;
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@@ -6148,18 +6143,18 @@ static void ixgbe_tx_map(struct ixgbe_ring *tx_ring,
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tx_desc = IXGBE_TX_DESC(tx_ring, 0);
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i = 0;
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}
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+ tx_desc->read.olinfo_status = 0;
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dma += IXGBE_MAX_DATA_PER_TXD;
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size -= IXGBE_MAX_DATA_PER_TXD;
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tx_desc->read.buffer_addr = cpu_to_le64(dma);
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- tx_desc->read.olinfo_status = 0;
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}
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if (likely(!data_len))
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break;
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- tx_desc->read.cmd_type_len = cmd_type | cpu_to_le32(size);
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+ tx_desc->read.cmd_type_len = cpu_to_le32(cmd_type ^ size);
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i++;
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tx_desc++;
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@@ -6167,6 +6162,7 @@ static void ixgbe_tx_map(struct ixgbe_ring *tx_ring,
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tx_desc = IXGBE_TX_DESC(tx_ring, 0);
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i = 0;
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}
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+ tx_desc->read.olinfo_status = 0;
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#ifdef IXGBE_FCOE
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size = min_t(unsigned int, data_len, skb_frag_size(frag));
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@@ -6177,22 +6173,13 @@ static void ixgbe_tx_map(struct ixgbe_ring *tx_ring,
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dma = skb_frag_dma_map(tx_ring->dev, frag, 0, size,
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DMA_TO_DEVICE);
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- if (dma_mapping_error(tx_ring->dev, dma))
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- goto dma_error;
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tx_buffer = &tx_ring->tx_buffer_info[i];
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- dma_unmap_len_set(tx_buffer, len, size);
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- dma_unmap_addr_set(tx_buffer, dma, dma);
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-
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- tx_desc->read.buffer_addr = cpu_to_le64(dma);
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- tx_desc->read.olinfo_status = 0;
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-
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- frag++;
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}
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/* write last descriptor with RS and EOP bits */
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- cmd_type |= cpu_to_le32(size) | cpu_to_le32(IXGBE_TXD_CMD);
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- tx_desc->read.cmd_type_len = cmd_type;
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+ cmd_type |= size | IXGBE_TXD_CMD;
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+ tx_desc->read.cmd_type_len = cpu_to_le32(cmd_type);
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netdev_tx_sent_queue(txring_txq(tx_ring), first->bytecount);
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@@ -6453,7 +6440,7 @@ netdev_tx_t ixgbe_xmit_frame_ring(struct sk_buff *skb,
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* Tx switch had been disabled.
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*/
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if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)
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- tx_flags |= IXGBE_TX_FLAGS_TXSW;
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+ tx_flags |= IXGBE_TX_FLAGS_CC;
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#endif
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/* DCB maps skb priorities 0-7 onto 3 bit PCP of VLAN tag. */
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David S. Miller