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@@ -479,109 +479,6 @@ static int disable_periodic (struct ehci_hcd *ehci)
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}
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/*-------------------------------------------------------------------------*/
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-#ifdef CONFIG_CPU_FREQ
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-
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-static int safe_to_modify_i (struct ehci_hcd *ehci, struct ehci_qh *qh)
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-{
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- int now; /* current (frame * 8) + uframe */
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- int prev_start, next_start; /* uframes from/to split start */
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- int start_uframe = ffs(le32_to_cpup (&qh->hw_info2) & QH_SMASK);
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- int end_uframe = fls((le32_to_cpup (&qh->hw_info2) & QH_CMASK) >> 8);
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- int split_duration = end_uframe - start_uframe;
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-
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- now = readl(&ehci->regs->frame_index) % (ehci->periodic_size << 3);
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-
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- next_start = ((1024 << 3) + (qh->start << 3) + start_uframe - now)
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- % (qh->period << 3);
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- prev_start = (qh->period << 3) - next_start;
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-
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- /*
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- * Make sure there will be at least one uframe when qh is safe.
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- */
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- if ((qh->period << 3) <= (ehci->i_thresh + 2 + split_duration))
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- /* never safe */
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- return -EINVAL;
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-
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- /*
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- * Wait 1 uframe after transaction should have started, to make
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- * sure controller has time to write back overlay, so we can
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- * check QTD_STS_STS to see if transaction is in progress.
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- */
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- if ((next_start > ehci->i_thresh) && (prev_start > 1))
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- /* safe to set "i" bit if split isn't in progress */
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- return (qh->hw_token & STATUS_BIT(ehci)) ? 0 : 1;
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- else
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- return 0;
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-}
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-
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-/* Set inactivate bit for all the split interrupt QHs. */
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-static void qh_inactivate_split_intr_qhs (struct ehci_hcd *ehci)
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-{
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- struct ehci_qh *qh;
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- int not_done, safe;
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- u32 inactivate = INACTIVATE_BIT(ehci);
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- u32 active = ACTIVE_BIT(ehci);
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-
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- do {
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- not_done = 0;
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- list_for_each_entry(qh, &ehci->split_intr_qhs,
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- split_intr_qhs) {
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- if (qh->hw_info1 & inactivate)
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- /* already off */
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- continue;
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- /*
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- * To avoid setting "I" after the start split happens,
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- * don't set it if the QH might be cached in the
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- * controller. Some HCs (Broadcom/ServerWorks HT1000)
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- * will stop in the middle of a split transaction when
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- * the "I" bit is set.
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- */
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- safe = safe_to_modify_i(ehci, qh);
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- if (safe == 0) {
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- not_done = 1;
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- } else if (safe > 0) {
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- qh->was_active = qh->hw_token & active;
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- qh->hw_info1 |= inactivate;
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- }
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- }
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- } while (not_done);
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- wmb();
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-}
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-
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-static void qh_reactivate_split_intr_qhs (struct ehci_hcd *ehci)
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-{
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- struct ehci_qh *qh;
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- u32 token;
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- int not_done, safe;
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- u32 inactivate = INACTIVATE_BIT(ehci);
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- u32 active = ACTIVE_BIT(ehci);
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- u32 halt = HALT_BIT(ehci);
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-
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- do {
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- not_done = 0;
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- list_for_each_entry(qh, &ehci->split_intr_qhs, split_intr_qhs) {
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- if (!(qh->hw_info1 & inactivate)) /* already on */
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- continue;
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- /*
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- * Don't reactivate if cached, or controller might
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- * overwrite overlay after we modify it!
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- */
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- safe = safe_to_modify_i(ehci, qh);
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- if (safe == 0) {
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- not_done = 1;
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- } else if (safe > 0) {
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- /* See EHCI 1.0 section 4.15.2.4. */
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- token = qh->hw_token;
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- qh->hw_token = (token | halt) & ~active;
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- wmb();
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- qh->hw_info1 &= ~inactivate;
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- wmb();
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- qh->hw_token = (token & ~halt) | qh->was_active;
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- }
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- }
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- } while (not_done);
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-}
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-#endif
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/* periodic schedule slots have iso tds (normal or split) first, then a
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* sparse tree for active interrupt transfers.
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@@ -599,17 +496,6 @@ static int qh_link_periodic (struct ehci_hcd *ehci, struct ehci_qh *qh)
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period, hc32_to_cpup(ehci, &qh->hw_info2) & (QH_CMASK | QH_SMASK),
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qh, qh->start, qh->usecs, qh->c_usecs);
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-#ifdef CONFIG_CPU_FREQ
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- /*
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- * If low/full speed interrupt QHs are inactive (because of
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- * cpufreq changing processor speeds), start QH with I flag set--
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- * it will automatically be cleared when cpufreq is done.
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- */
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- if (ehci->cpufreq_changing)
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- if (!(qh->hw_info1 & (cpu_to_le32(1 << 13))))
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- qh->hw_info1 |= INACTIVATE_BIT(ehci);
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-#endif
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-
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/* high bandwidth, or otherwise every microframe */
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if (period == 0)
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period = 1;
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@@ -658,12 +544,6 @@ static int qh_link_periodic (struct ehci_hcd *ehci, struct ehci_qh *qh)
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? ((qh->usecs + qh->c_usecs) / qh->period)
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: (qh->usecs * 8);
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-#ifdef CONFIG_CPU_FREQ
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- /* add qh to list of low/full speed interrupt QHs, if applicable */
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- if (!(qh->hw_info1 & (cpu_to_le32(1 << 13)))) {
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- list_add(&qh->split_intr_qhs, &ehci->split_intr_qhs);
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- }
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-#endif
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/* maybe enable periodic schedule processing */
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if (!ehci->periodic_sched++)
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return enable_periodic (ehci);
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@@ -683,13 +563,6 @@ static void qh_unlink_periodic (struct ehci_hcd *ehci, struct ehci_qh *qh)
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// THEN
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// qh->hw_info1 |= __constant_cpu_to_hc32(1 << 7 /* "ignore" */);
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-#ifdef CONFIG_CPU_FREQ
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- /* remove qh from list of low/full speed interrupt QHs */
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- if (!(qh->hw_info1 & (cpu_to_le32(1 << 13)))) {
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- list_del_init(&qh->split_intr_qhs);
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- }
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-#endif
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-
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/* high bandwidth, or otherwise part of every microframe */
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if ((period = qh->period) == 0)
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period = 1;
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Linus Torvalds