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@@ -24,7 +24,8 @@
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#define ATH6KL_TIME_QUANTUM 10 /* in ms */
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-static int ath6kldev_cp_scat_dma_buf(struct hif_scatter_req *req, bool from_dma)
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+static int ath6kl_hif_cp_scat_dma_buf(struct hif_scatter_req *req,
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+ bool from_dma)
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{
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u8 *buf;
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int i;
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@@ -46,12 +47,12 @@ static int ath6kldev_cp_scat_dma_buf(struct hif_scatter_req *req, bool from_dma)
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return 0;
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}
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-int ath6kldev_rw_comp_handler(void *context, int status)
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+int ath6kl_hif_rw_comp_handler(void *context, int status)
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{
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struct htc_packet *packet = context;
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ath6kl_dbg(ATH6KL_DBG_HTC_RECV,
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- "ath6kldev_rw_comp_handler (pkt:0x%p , status: %d\n",
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+ "ath6kl_hif_rw_comp_handler (pkt:0x%p , status: %d\n",
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packet, status);
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packet->status = status;
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@@ -60,7 +61,7 @@ int ath6kldev_rw_comp_handler(void *context, int status)
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return 0;
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}
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-static int ath6kldev_proc_dbg_intr(struct ath6kl_device *dev)
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+static int ath6kl_hif_proc_dbg_intr(struct ath6kl_device *dev)
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{
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u32 dummy;
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int status;
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@@ -82,7 +83,7 @@ static int ath6kldev_proc_dbg_intr(struct ath6kl_device *dev)
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}
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/* mailbox recv message polling */
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-int ath6kldev_poll_mboxmsg_rx(struct ath6kl_device *dev, u32 *lk_ahd,
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+int ath6kl_hif_poll_mboxmsg_rx(struct ath6kl_device *dev, u32 *lk_ahd,
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int timeout)
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{
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struct ath6kl_irq_proc_registers *rg;
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@@ -131,7 +132,7 @@ int ath6kldev_poll_mboxmsg_rx(struct ath6kl_device *dev, u32 *lk_ahd,
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* Target failure handler will be called in case of
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* an assert.
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*/
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- ath6kldev_proc_dbg_intr(dev);
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+ ath6kl_hif_proc_dbg_intr(dev);
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}
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return status;
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@@ -141,7 +142,7 @@ int ath6kldev_poll_mboxmsg_rx(struct ath6kl_device *dev, u32 *lk_ahd,
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* Disable packet reception (used in case the host runs out of buffers)
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* using the interrupt enable registers through the host I/F
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*/
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-int ath6kldev_rx_control(struct ath6kl_device *dev, bool enable_rx)
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+int ath6kl_hif_rx_control(struct ath6kl_device *dev, bool enable_rx)
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{
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struct ath6kl_irq_enable_reg regs;
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int status = 0;
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@@ -168,7 +169,7 @@ int ath6kldev_rx_control(struct ath6kl_device *dev, bool enable_rx)
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return status;
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}
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-int ath6kldev_submit_scat_req(struct ath6kl_device *dev,
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+int ath6kl_hif_submit_scat_req(struct ath6kl_device *dev,
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struct hif_scatter_req *scat_req, bool read)
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{
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int status = 0;
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@@ -186,13 +187,13 @@ int ath6kldev_submit_scat_req(struct ath6kl_device *dev,
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}
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ath6kl_dbg((ATH6KL_DBG_HTC_RECV | ATH6KL_DBG_HTC_SEND),
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- "ath6kldev_submit_scat_req, entries: %d, total len: %d mbox:0x%X (mode: %s : %s)\n",
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+ "ath6kl_hif_submit_scat_req, entries: %d, total len: %d mbox:0x%X (mode: %s : %s)\n",
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scat_req->scat_entries, scat_req->len,
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scat_req->addr, !read ? "async" : "sync",
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(read) ? "rd" : "wr");
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if (!read && scat_req->virt_scat) {
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- status = ath6kldev_cp_scat_dma_buf(scat_req, false);
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+ status = ath6kl_hif_cp_scat_dma_buf(scat_req, false);
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if (status) {
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scat_req->status = status;
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scat_req->complete(dev->ar->htc_target, scat_req);
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@@ -207,13 +208,13 @@ int ath6kldev_submit_scat_req(struct ath6kl_device *dev,
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scat_req->status = status;
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if (!status && scat_req->virt_scat)
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scat_req->status =
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- ath6kldev_cp_scat_dma_buf(scat_req, true);
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+ ath6kl_hif_cp_scat_dma_buf(scat_req, true);
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}
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return status;
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}
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-static int ath6kldev_proc_counter_intr(struct ath6kl_device *dev)
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+static int ath6kl_hif_proc_counter_intr(struct ath6kl_device *dev)
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{
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u8 counter_int_status;
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@@ -232,12 +233,12 @@ static int ath6kldev_proc_counter_intr(struct ath6kl_device *dev)
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* the debug assertion counter interrupt.
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*/
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if (counter_int_status & ATH6KL_TARGET_DEBUG_INTR_MASK)
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- return ath6kldev_proc_dbg_intr(dev);
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+ return ath6kl_hif_proc_dbg_intr(dev);
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return 0;
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}
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-static int ath6kldev_proc_err_intr(struct ath6kl_device *dev)
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+static int ath6kl_hif_proc_err_intr(struct ath6kl_device *dev)
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{
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int status;
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u8 error_int_status;
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@@ -282,7 +283,7 @@ static int ath6kldev_proc_err_intr(struct ath6kl_device *dev)
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return status;
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}
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-static int ath6kldev_proc_cpu_intr(struct ath6kl_device *dev)
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+static int ath6kl_hif_proc_cpu_intr(struct ath6kl_device *dev)
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{
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int status;
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u8 cpu_int_status;
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@@ -436,21 +437,21 @@ static int proc_pending_irqs(struct ath6kl_device *dev, bool *done)
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if (MS(HOST_INT_STATUS_CPU, host_int_status)) {
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/* CPU Interrupt */
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- status = ath6kldev_proc_cpu_intr(dev);
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+ status = ath6kl_hif_proc_cpu_intr(dev);
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if (status)
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goto out;
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}
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if (MS(HOST_INT_STATUS_ERROR, host_int_status)) {
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/* Error Interrupt */
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- status = ath6kldev_proc_err_intr(dev);
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+ status = ath6kl_hif_proc_err_intr(dev);
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if (status)
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goto out;
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}
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if (MS(HOST_INT_STATUS_COUNTER, host_int_status))
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/* Counter Interrupt */
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- status = ath6kldev_proc_counter_intr(dev);
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+ status = ath6kl_hif_proc_counter_intr(dev);
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out:
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/*
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@@ -479,7 +480,7 @@ out:
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}
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/* interrupt handler, kicks off all interrupt processing */
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-int ath6kldev_intr_bh_handler(struct ath6kl *ar)
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+int ath6kl_hif_intr_bh_handler(struct ath6kl *ar)
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{
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struct ath6kl_device *dev = ar->htc_target->dev;
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int status = 0;
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@@ -504,7 +505,7 @@ int ath6kldev_intr_bh_handler(struct ath6kl *ar)
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return status;
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}
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-static int ath6kldev_enable_intrs(struct ath6kl_device *dev)
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+static int ath6kl_hif_enable_intrs(struct ath6kl_device *dev)
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{
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struct ath6kl_irq_enable_reg regs;
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int status;
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@@ -552,7 +553,7 @@ static int ath6kldev_enable_intrs(struct ath6kl_device *dev)
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return status;
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}
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-int ath6kldev_disable_intrs(struct ath6kl_device *dev)
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+int ath6kl_hif_disable_intrs(struct ath6kl_device *dev)
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{
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struct ath6kl_irq_enable_reg regs;
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@@ -571,7 +572,7 @@ int ath6kldev_disable_intrs(struct ath6kl_device *dev)
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}
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/* enable device interrupts */
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-int ath6kldev_unmask_intrs(struct ath6kl_device *dev)
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+int ath6kl_hif_unmask_intrs(struct ath6kl_device *dev)
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{
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int status = 0;
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@@ -583,29 +584,29 @@ int ath6kldev_unmask_intrs(struct ath6kl_device *dev)
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* target "soft" resets. The ATH6KL interrupt enables reset back to an
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* "enabled" state when this happens.
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*/
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- ath6kldev_disable_intrs(dev);
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+ ath6kl_hif_disable_intrs(dev);
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/* unmask the host controller interrupts */
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ath6kl_hif_irq_enable(dev->ar);
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- status = ath6kldev_enable_intrs(dev);
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+ status = ath6kl_hif_enable_intrs(dev);
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return status;
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}
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/* disable all device interrupts */
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-int ath6kldev_mask_intrs(struct ath6kl_device *dev)
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+int ath6kl_hif_mask_intrs(struct ath6kl_device *dev)
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{
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/*
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* Mask the interrupt at the HIF layer to avoid any stray interrupt
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* taken while we zero out our shadow registers in
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- * ath6kldev_disable_intrs().
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+ * ath6kl_hif_disable_intrs().
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*/
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ath6kl_hif_irq_disable(dev->ar);
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- return ath6kldev_disable_intrs(dev);
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+ return ath6kl_hif_disable_intrs(dev);
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}
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-int ath6kldev_setup(struct ath6kl_device *dev)
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+int ath6kl_hif_setup(struct ath6kl_device *dev)
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{
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int status = 0;
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@@ -634,7 +635,7 @@ int ath6kldev_setup(struct ath6kl_device *dev)
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ath6kl_dbg(ATH6KL_DBG_TRC,
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"hif interrupt processing is sync only\n");
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- status = ath6kldev_disable_intrs(dev);
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+ status = ath6kl_hif_disable_intrs(dev);
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fail_setup:
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return status;
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