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@@ -915,7 +915,7 @@ u32 w89rf242_txvga_data[][5] =
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// The address is stored in EthernetIDAddr.
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// The address is stored in EthernetIDAddr.
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//=============================================================================================================
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//=============================================================================================================
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void
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void
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-Uxx_ReadEthernetAddress( phw_data_t pHwData )
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+Uxx_ReadEthernetAddress( struct hw_data * pHwData )
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{
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{
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u32 ltmp;
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u32 ltmp;
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@@ -964,7 +964,7 @@ void CardGetMulticastBit( u8 Address[ETH_ALEN], u8 *Byte, u8 *Value )
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*Value = (u8) ((u8)1 << (BitNumber % 8));
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*Value = (u8) ((u8)1 << (BitNumber % 8));
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}
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}
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-void Uxx_power_on_procedure( phw_data_t pHwData )
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+void Uxx_power_on_procedure( struct hw_data * pHwData )
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{
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{
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u32 ltmp, loop;
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u32 ltmp, loop;
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@@ -1008,7 +1008,7 @@ void Uxx_power_on_procedure( phw_data_t pHwData )
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Wb35Reg_WriteSync( pHwData, 0x03f8, 0x7ff );
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Wb35Reg_WriteSync( pHwData, 0x03f8, 0x7ff );
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}
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}
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-void Set_ChanIndep_RfData_al7230_24( phw_data_t pHwData, u32 *pltmp ,char number)
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+void Set_ChanIndep_RfData_al7230_24( struct hw_data * pHwData, u32 *pltmp ,char number)
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{
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{
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u8 i;
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u8 i;
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@@ -1019,7 +1019,7 @@ void Set_ChanIndep_RfData_al7230_24( phw_data_t pHwData, u32 *pltmp ,char numbe
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}
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}
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}
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}
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-void Set_ChanIndep_RfData_al7230_50( phw_data_t pHwData, u32 *pltmp, char number)
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+void Set_ChanIndep_RfData_al7230_50( struct hw_data * pHwData, u32 *pltmp, char number)
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{
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{
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u8 i;
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u8 i;
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@@ -1035,7 +1035,7 @@ void Set_ChanIndep_RfData_al7230_50( phw_data_t pHwData, u32 *pltmp, char numbe
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// RFSynthesizer_initial --
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// RFSynthesizer_initial --
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//=============================================================================================================
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//=============================================================================================================
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void
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void
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-RFSynthesizer_initial(phw_data_t pHwData)
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+RFSynthesizer_initial(struct hw_data * pHwData)
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{
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{
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u32 altmp[32];
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u32 altmp[32];
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u32 * pltmp = altmp;
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u32 * pltmp = altmp;
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@@ -1413,7 +1413,7 @@ RFSynthesizer_initial(phw_data_t pHwData)
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}
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}
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}
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}
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-void BBProcessor_AL7230_2400( phw_data_t pHwData)
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+void BBProcessor_AL7230_2400( struct hw_data * pHwData)
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{
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{
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struct wb35_reg *reg = &pHwData->reg;
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struct wb35_reg *reg = &pHwData->reg;
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u32 pltmp[12];
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u32 pltmp[12];
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@@ -1455,7 +1455,7 @@ void BBProcessor_AL7230_2400( phw_data_t pHwData)
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}
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}
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-void BBProcessor_AL7230_5000( phw_data_t pHwData)
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+void BBProcessor_AL7230_5000( struct hw_data * pHwData)
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{
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{
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struct wb35_reg *reg = &pHwData->reg;
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struct wb35_reg *reg = &pHwData->reg;
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u32 pltmp[12];
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u32 pltmp[12];
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@@ -1509,7 +1509,7 @@ void BBProcessor_AL7230_5000( phw_data_t pHwData)
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// None.
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// None.
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//=============================================================================================================
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//=============================================================================================================
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void
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void
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-BBProcessor_initial( phw_data_t pHwData )
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+BBProcessor_initial( struct hw_data * pHwData )
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{
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{
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struct wb35_reg *reg = &pHwData->reg;
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struct wb35_reg *reg = &pHwData->reg;
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u32 i, pltmp[12];
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u32 i, pltmp[12];
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@@ -1823,12 +1823,12 @@ BBProcessor_initial( phw_data_t pHwData )
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reg->SQ3_filter[i] = 0x2f; // half of Bit 0 ~ 6
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reg->SQ3_filter[i] = 0x2f; // half of Bit 0 ~ 6
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}
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}
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-void set_tx_power_per_channel_max2829( phw_data_t pHwData, ChanInfo Channel)
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+void set_tx_power_per_channel_max2829( struct hw_data * pHwData, ChanInfo Channel)
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{
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{
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RFSynthesizer_SetPowerIndex( pHwData, 100 ); // 20060620.1 Modify
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RFSynthesizer_SetPowerIndex( pHwData, 100 ); // 20060620.1 Modify
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}
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}
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-void set_tx_power_per_channel_al2230( phw_data_t pHwData, ChanInfo Channel )
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+void set_tx_power_per_channel_al2230( struct hw_data * pHwData, ChanInfo Channel )
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{
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{
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u8 index = 100;
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u8 index = 100;
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@@ -1838,7 +1838,7 @@ void set_tx_power_per_channel_al2230( phw_data_t pHwData, ChanInfo Channel )
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RFSynthesizer_SetPowerIndex( pHwData, index );
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RFSynthesizer_SetPowerIndex( pHwData, index );
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}
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}
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-void set_tx_power_per_channel_al7230( phw_data_t pHwData, ChanInfo Channel)
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+void set_tx_power_per_channel_al7230( struct hw_data * pHwData, ChanInfo Channel)
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{
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{
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u8 i, index = 100;
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u8 i, index = 100;
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@@ -1868,7 +1868,7 @@ void set_tx_power_per_channel_al7230( phw_data_t pHwData, ChanInfo Channel)
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RFSynthesizer_SetPowerIndex( pHwData, index );
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RFSynthesizer_SetPowerIndex( pHwData, index );
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}
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}
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-void set_tx_power_per_channel_wb242( phw_data_t pHwData, ChanInfo Channel)
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+void set_tx_power_per_channel_wb242( struct hw_data * pHwData, ChanInfo Channel)
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{
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{
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u8 index = 100;
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u8 index = 100;
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@@ -1901,7 +1901,7 @@ void set_tx_power_per_channel_wb242( phw_data_t pHwData, ChanInfo Channel)
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// None.
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// None.
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//=============================================================================================================
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//=============================================================================================================
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void
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void
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-RFSynthesizer_SwitchingChannel( phw_data_t pHwData, ChanInfo Channel )
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+RFSynthesizer_SwitchingChannel( struct hw_data * pHwData, ChanInfo Channel )
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{
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{
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struct wb35_reg *reg = &pHwData->reg;
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struct wb35_reg *reg = &pHwData->reg;
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u32 pltmp[16]; // The 16 is the maximum capability of hardware
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u32 pltmp[16]; // The 16 is the maximum capability of hardware
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@@ -2129,7 +2129,7 @@ RFSynthesizer_SwitchingChannel( phw_data_t pHwData, ChanInfo Channel )
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}
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}
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//Set the tx power directly from DUT GUI, not from the EEPROM. Return the current setting
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//Set the tx power directly from DUT GUI, not from the EEPROM. Return the current setting
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-u8 RFSynthesizer_SetPowerIndex( phw_data_t pHwData, u8 PowerIndex )
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+u8 RFSynthesizer_SetPowerIndex( struct hw_data * pHwData, u8 PowerIndex )
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{
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{
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u32 Band = pHwData->band;
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u32 Band = pHwData->band;
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u8 index=0;
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u8 index=0;
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@@ -2187,7 +2187,7 @@ u8 RFSynthesizer_SetPowerIndex( phw_data_t pHwData, u8 PowerIndex )
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}
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}
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//-- Sub function
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//-- Sub function
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-u8 RFSynthesizer_SetMaxim2828_24Power( phw_data_t pHwData, u8 index )
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+u8 RFSynthesizer_SetMaxim2828_24Power( struct hw_data * pHwData, u8 index )
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{
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{
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u32 PowerData;
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u32 PowerData;
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if( index > 1 ) index = 1;
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if( index > 1 ) index = 1;
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@@ -2196,7 +2196,7 @@ u8 RFSynthesizer_SetMaxim2828_24Power( phw_data_t pHwData, u8 index )
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return index;
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return index;
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}
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}
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//--
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//--
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-u8 RFSynthesizer_SetMaxim2828_50Power( phw_data_t pHwData, u8 index )
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+u8 RFSynthesizer_SetMaxim2828_50Power( struct hw_data * pHwData, u8 index )
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{
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{
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u32 PowerData;
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u32 PowerData;
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if( index > 1 ) index = 1;
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if( index > 1 ) index = 1;
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@@ -2205,7 +2205,7 @@ u8 RFSynthesizer_SetMaxim2828_50Power( phw_data_t pHwData, u8 index )
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return index;
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return index;
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}
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}
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//--
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//--
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-u8 RFSynthesizer_SetMaxim2827_24Power( phw_data_t pHwData, u8 index )
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+u8 RFSynthesizer_SetMaxim2827_24Power( struct hw_data * pHwData, u8 index )
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{
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{
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u32 PowerData;
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u32 PowerData;
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if( index > 1 ) index = 1;
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if( index > 1 ) index = 1;
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@@ -2214,7 +2214,7 @@ u8 RFSynthesizer_SetMaxim2827_24Power( phw_data_t pHwData, u8 index )
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return index;
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return index;
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}
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}
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//--
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//--
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-u8 RFSynthesizer_SetMaxim2827_50Power( phw_data_t pHwData, u8 index )
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+u8 RFSynthesizer_SetMaxim2827_50Power( struct hw_data * pHwData, u8 index )
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{
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{
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u32 PowerData;
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u32 PowerData;
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if( index > 1 ) index = 1;
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if( index > 1 ) index = 1;
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@@ -2223,7 +2223,7 @@ u8 RFSynthesizer_SetMaxim2827_50Power( phw_data_t pHwData, u8 index )
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return index;
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return index;
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}
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}
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//--
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//--
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-u8 RFSynthesizer_SetMaxim2825Power( phw_data_t pHwData, u8 index )
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+u8 RFSynthesizer_SetMaxim2825Power( struct hw_data * pHwData, u8 index )
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{
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{
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u32 PowerData;
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u32 PowerData;
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if( index > 1 ) index = 1;
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if( index > 1 ) index = 1;
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@@ -2232,7 +2232,7 @@ u8 RFSynthesizer_SetMaxim2825Power( phw_data_t pHwData, u8 index )
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return index;
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return index;
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}
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}
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//--
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//--
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-u8 RFSynthesizer_SetAiroha2230Power( phw_data_t pHwData, u8 index )
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+u8 RFSynthesizer_SetAiroha2230Power( struct hw_data * pHwData, u8 index )
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{
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{
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u32 PowerData;
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u32 PowerData;
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u8 i,count;
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u8 i,count;
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@@ -2251,7 +2251,7 @@ u8 RFSynthesizer_SetAiroha2230Power( phw_data_t pHwData, u8 index )
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return i;
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return i;
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}
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}
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//--
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//--
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-u8 RFSynthesizer_SetAiroha7230Power( phw_data_t pHwData, u8 index )
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+u8 RFSynthesizer_SetAiroha7230Power( struct hw_data * pHwData, u8 index )
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{
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{
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u32 PowerData;
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u32 PowerData;
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u8 i,count;
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u8 i,count;
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@@ -2270,7 +2270,7 @@ u8 RFSynthesizer_SetAiroha7230Power( phw_data_t pHwData, u8 index )
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return i;
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return i;
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}
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}
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-u8 RFSynthesizer_SetWinbond242Power( phw_data_t pHwData, u8 index )
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+u8 RFSynthesizer_SetWinbond242Power( struct hw_data * pHwData, u8 index )
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{
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{
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u32 PowerData;
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u32 PowerData;
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u8 i,count;
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u8 i,count;
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@@ -2311,7 +2311,7 @@ u8 RFSynthesizer_SetWinbond242Power( phw_data_t pHwData, u8 index )
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// Initial the hardware setting and module variable
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// Initial the hardware setting and module variable
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//
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//
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//===========================================================================================================
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//===========================================================================================================
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-void Dxx_initial( phw_data_t pHwData )
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+void Dxx_initial( struct hw_data * pHwData )
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{
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{
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struct wb35_reg *reg = &pHwData->reg;
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struct wb35_reg *reg = &pHwData->reg;
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@@ -2325,7 +2325,7 @@ void Dxx_initial( phw_data_t pHwData )
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Wb35Reg_WriteSync( pHwData, 0x0400, reg->D00_DmaControl );
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Wb35Reg_WriteSync( pHwData, 0x0400, reg->D00_DmaControl );
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}
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}
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-void Mxx_initial( phw_data_t pHwData )
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+void Mxx_initial( struct hw_data * pHwData )
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{
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{
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struct wb35_reg *reg = &pHwData->reg;
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struct wb35_reg *reg = &pHwData->reg;
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u32 tmp;
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u32 tmp;
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@@ -2416,7 +2416,7 @@ void Mxx_initial( phw_data_t pHwData )
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}
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}
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-void Uxx_power_off_procedure( phw_data_t pHwData )
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+void Uxx_power_off_procedure( struct hw_data * pHwData )
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{
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{
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// SW, PMU reset and turn off clock
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// SW, PMU reset and turn off clock
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Wb35Reg_WriteSync( pHwData, 0x03b0, 3 );
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Wb35Reg_WriteSync( pHwData, 0x03b0, 3 );
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@@ -2424,7 +2424,7 @@ void Uxx_power_off_procedure( phw_data_t pHwData )
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}
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}
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//Decide the TxVga of every channel
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//Decide the TxVga of every channel
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-void GetTxVgaFromEEPROM( phw_data_t pHwData )
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+void GetTxVgaFromEEPROM( struct hw_data * pHwData )
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{
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{
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u32 i, j, ltmp;
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u32 i, j, ltmp;
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u16 Value[MAX_TXVGA_EEPROM];
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u16 Value[MAX_TXVGA_EEPROM];
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@@ -2478,7 +2478,7 @@ void GetTxVgaFromEEPROM( phw_data_t pHwData )
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// or RFSynthesizer_SetPowerIndex be called, new TxVga will take effect.
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// or RFSynthesizer_SetPowerIndex be called, new TxVga will take effect.
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// TxVgaSettingInEEPROM of sHwData is an u8 array point to EEPROM contain for IS89C35
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// TxVgaSettingInEEPROM of sHwData is an u8 array point to EEPROM contain for IS89C35
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// This function will use default TxVgaSettingInEEPROM data to calculate new TxVga.
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// This function will use default TxVgaSettingInEEPROM data to calculate new TxVga.
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-void EEPROMTxVgaAdjust( phw_data_t pHwData ) // 20060619.5 Add
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+void EEPROMTxVgaAdjust( struct hw_data * pHwData ) // 20060619.5 Add
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{
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{
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u8 * pTxVga = pHwData->TxVgaSettingInEEPROM;
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u8 * pTxVga = pHwData->TxVgaSettingInEEPROM;
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s16 i, stmp;
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s16 i, stmp;
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@@ -2618,7 +2618,7 @@ void EEPROMTxVgaAdjust( phw_data_t pHwData ) // 20060619.5 Add
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#endif
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#endif
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}
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}
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-void BBProcessor_RateChanging( phw_data_t pHwData, u8 rate ) // 20060613.1
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+void BBProcessor_RateChanging( struct hw_data * pHwData, u8 rate ) // 20060613.1
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{
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{
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struct wb35_reg *reg = &pHwData->reg;
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struct wb35_reg *reg = &pHwData->reg;
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unsigned char Is11bRate;
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unsigned char Is11bRate;
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