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@@ -871,6 +871,8 @@
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/* PLL_DIV Masks */
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/* PLL_DIV Masks */
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#define SCLK_DIV(x) (x) /* SCLK = VCO / x */
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#define SCLK_DIV(x) (x) /* SCLK = VCO / x */
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+#define CSEL 0x30 /* Core Select */
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+#define SSEL 0xf /* System Select */
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#define CCLK_DIV1 0x00000000 /* CCLK = VCO / 1 */
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#define CCLK_DIV1 0x00000000 /* CCLK = VCO / 1 */
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#define CCLK_DIV2 0x00000010 /* CCLK = VCO / 2 */
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#define CCLK_DIV2 0x00000010 /* CCLK = VCO / 2 */
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#define CCLK_DIV4 0x00000020 /* CCLK = VCO / 4 */
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#define CCLK_DIV4 0x00000020 /* CCLK = VCO / 4 */
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